summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-03-19 21:04:23 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-04 11:22:53 +0200
commit580e7223bb617cfa14bf24e48bb39bac47c4e8e0 (patch)
tree13d7034347e8497dcbf7699746830727b33084bd /src/southbridge/intel/bd82x6x
parent2d2367cd95dc6ab2dd51b1005675e42bab417769 (diff)
devicetree: Change scan_bus() prototype in device ops
The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x')
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 42a8578b1d..1b8ac76126 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -273,13 +273,12 @@ static void pch_pcie_enable(device_t dev)
pch_pcie_pm_early(dev);
}
-static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
+static void pch_pciexp_scan_bridge(device_t dev)
{
- unsigned int ret;
struct southbridge_intel_bd82x6x_config *config = dev->chip_info;
/* Normal PCIe Scan */
- ret = pciexp_scan_bridge(dev, max);
+ pciexp_scan_bridge(dev);
if (config->pcie_hotplug_map[PCI_FUNC(dev->path.pci.devfn)]) {
intel_acpi_pcie_hotplug_scan_slot(dev->link_list);
@@ -287,8 +286,6 @@ static unsigned int pch_pciexp_scan_bridge(device_t dev, unsigned int max)
/* Late Power Management init after bridge device enumeration */
pch_pcie_pm_late(dev);
-
- return ret;
}
static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)