intel: Use CF9 reset (part 1)

Add SOUTHBRIDGE_INTEL_COMMON_RESET for all Intel platforms that used to
perform a "system reset" in their hard_reset() implementation. Replace
all duplicate CF9 reset implementations for these platforms.

Change-Id: I8e359b0c4d5a1060edd0940d24c2f78dfed8a590
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/28862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

3 files changed, 0 insertions, 31 deletions

diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 16602cf883..20cdeb84e3 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -29,7 +29,6 @@ config SOUTH_BRIDGE_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_COMMON_SMBUS
 	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select IOAPIC
-	select HAVE_HARD_RESET
 	select HAVE_USBDEBUG_OPTIONS
 	select HAVE_SMI_HANDLER
 	select USE_WATCHDOG_ON_BOOT
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index ea8e96c338..d8730dfdd3 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -31,7 +31,6 @@ ramstage-y += ../common/pciehp.c
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
 
 ramstage-y += me_status.c
-ramstage-y += reset.c
 ramstage-y += watchdog.c
 
 ramstage-$(CONFIG_ELOG) += elog.c
@@ -39,7 +38,6 @@ ramstage-$(CONFIG_ELOG) += elog.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c
 
 romstage-y += early_smbus.c me_status.c
-romstage-y += reset.c
 romstage-y += early_spi.c early_pch_common.c
 romstage-y += early_rcba.c
 
diff --git a/src/southbridge/intel/bd82x6x/reset.c b/src/southbridge/intel/bd82x6x/reset.c
deleted file mode 100644
index 7faadb62df..0000000000
--- a/src/southbridge/intel/bd82x6x/reset.c
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <reset.h>
-
-void do_soft_reset(void)
-{
-	outb(0x04, 0xcf9);
-}
-
-void do_hard_reset(void)
-{
-	outb(0x06, 0xcf9);
-}