diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-05-24 11:10:31 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:45:23 +0100 |
| commit | 14031db21f3a41966a30bfc27bc97ddf03f40458 (patch) | |
| tree | 25604c15ca0046f639b3fbaa2eced064b2c224c8 /src/southbridge/intel/bd82x6x/pcie.c | |
| parent | 96f77bd0d9436eb4259d2a132670735ac20e8b95 (diff) | |
lynxpoint: Add ACPI Method to enable GPIO as wake source
This is an LPT-LP specific method that will enable a specific
GPIO as an ACPI SCI wake source.
It can be used by a device _DSW method to enable a pin that is
otherwise not configured to generate SCI at runtime.
It will set:
- GPIO owner to ACPI
- GPIO route to SCI
- GPIO config to GPIO, Input, Inverted
Also clean up and remove ACPI field definitions that are unused
and/or incorrect.
Change-Id: I14acc2de50e6200f61c2898a7bd1252400e0f0be
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56621
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4189
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/pcie.c')
0 files changed, 0 insertions, 0 deletions