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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-19 16:39:21 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-20 03:10:06 +0100 |
| commit | dfb2de80ec7a4cc26bc31158405620e807072714 (patch) | |
| tree | 2ef8da024f7ec3f7f6859836f1c1b03fea464161 /src/southbridge/intel/bd82x6x/lpc.c | |
| parent | 1f0ce3a80ed16e7d3a0737720ff6276e4a5893e5 (diff) | |
intel car: Move pre-ram stack guard lower
SPD data alone consumes 0x400 of pre-ram stack, so the guard was
initially set too high, printing spurious "smashed stack detected"
messages at end of romstage.
Use the same stack size as haswell.
Change-Id: I24fff6228bc5207750a3c4bf8cf34e91cf35e716
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17501
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/lpc.c')
0 files changed, 0 insertions, 0 deletions