diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-07-14 11:54:58 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2019-07-18 05:42:55 +0000 |
| commit | 4f8b108288bf080762d28e5260ecf1d0a6e89697 (patch) | |
| tree | ba845049ec518bf2bea78e983360e525316a3dba /src/southbridge/intel/bd82x6x/early_usb.c | |
| parent | 44443696afed62f074dab1468c270ab207f5bb69 (diff) | |
sb/intel/bd82x6x: Add and use more RCBA defines
Taken from
"Intel 6 Series Chipset and Intel C200 Series Chipset"
Document Number: 324645-006 and
"Intel 5 Series Chipset and Intel 3400 Series Chipset"
Document Number: 322169-004 and
"Intel 6 Series Chipset"
Document Number: 324645-001.
UPDCR was found in GNU/Linux's drivers/pci/quirks.c.
DMC2 was guessed as it's close to DMC and defined for 5 series chipset.
Test:
Run BUILD_TIMELESS=1 and compared the coreboot.roms, no differences.
Change-Id: I4fed7c38078cabd4308424c7547416e87c9e6fa7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_usb.c')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/early_usb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index e5d5625cab..e735e21656 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -39,7 +39,7 @@ void early_usb_init(const struct southbridge_usb_port *portmap) write_pmbase16(UPRWC, read_pmbase16(UPRWC) | UPRWC_WR_EN); for (i = 0; i < 14; i++) - RCBA32(0x3500 + 4 * i) = currents[portmap[i].current]; + RCBA32(USBIR0 + 4 * i) = currents[portmap[i].current]; for (i = 0; i < 10; i++) RCBA32(0x3538 + 4 * i) = 0; |