summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/bd82x6x/early_spi.c
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2014-03-21 21:32:12 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-12-09 20:32:06 +0100
commit967058f807418dc964ca04849b59c3b2a03dbee5 (patch)
treedb501e751f3d6d75e17f796c07ec39ba9d094995 /src/southbridge/intel/bd82x6x/early_spi.c
parent30974bc2f5f4764425e69256782cca03b290c4f4 (diff)
spi: Factor EC protocol details out of the SPI drivers.
The SPI drivers for tegra and exynos5420 have code in them which waits for a frame header and leaves filler data out. The SPI driver shouldn't have support for frame headers directly. If a device uses them, it should support them itself. That makes the SPI drivers simpler and easier to write. When moving the frame handling logic into the EC support code, EC communication continued to work on tegra but no longer worked on exynos5420. That suggested the SPI driver on the 5420 wasn't working correctly, so I replaced that with the implementation in depthcharge. Unfortunately that implementation doesn't support waiting for a frame header for the EC, so these changes are combined into one. BUG=None TEST=Built and booted on pit. Built and booted on nyan. In both cases, verified that there were no error messages from the SPI drivers or the EC code. BRANCH=None Original-Change-Id: I62a68820c632f154acece94f54276ddcd1442c09 Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/191192 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 4fcfed280ad70f14a013d5353aa0bee0af540630) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Id8824523abc7afcbc214845901628833e135d142 Reviewed-on: http://review.coreboot.org/7706 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/early_spi.c')
0 files changed, 0 insertions, 0 deletions