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authorArthur Heymans <arthur@aheymans.xyz>2019-05-28 13:51:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-09-30 12:02:15 +0000
commitebf201b8f563ece11ceb60d81ba9cd676020da42 (patch)
treebdb00435ca3840475f3947c7432a3f564648c40d /src/southbridge/intel/bd82x6x/chip.h
parentff5eb86aeb3e2129882120150132ba83dd1efea0 (diff)
sb/intel/bd82x6x: Use common final SPI OPs setup
This also reworks the interface to override OPs from the devicetree to match the interface in sb/intel/common/spi. Change-Id: I534e989279d771ec4c0249af325bc3b30a661145 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33040 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/chip.h')
-rw-r--r--src/southbridge/intel/bd82x6x/chip.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h
index 4be91522d2..9f9c4455bb 100644
--- a/src/southbridge/intel/bd82x6x/chip.h
+++ b/src/southbridge/intel/bd82x6x/chip.h
@@ -16,6 +16,7 @@
#ifndef SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
#define SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H
+#include <southbridge/intel/common/spi.h>
#include <stdint.h>
struct southbridge_intel_bd82x6x_config {
@@ -96,14 +97,7 @@ struct southbridge_intel_bd82x6x_config {
uint32_t spi_uvscc;
uint32_t spi_lvscc;
- struct {
- uint8_t opprefixes[2];
- struct {
- uint8_t needs_address;
- uint8_t is_write;
- uint8_t op;
- } ops[8];
- } spi;
+ struct intel_swseq_spi_config spi;
};
#endif /* SOUTHBRIDGE_INTEL_BD82X6X_CHIP_H */