diff options
| author | Felix Singer <felixsinger@posteo.net> | 2022-01-02 01:23:28 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-07-29 10:16:25 +0000 |
| commit | f333a442a3767a5b3ca35ca3b75278e3636d44e5 (patch) | |
| tree | 2a953ae89d2376fa7f5afc176a2dc9880138b211 /src/southbridge/intel/bd82x6x/acpi/pch.asl | |
| parent | 644e59b7ba83b655f320156bbb43341021e9cf6c (diff) | |
sb/intel/bd82x6x/acpi: Replace LEqual(a,b) with ASL 2.0 syntax
Replace `LEqual(a, b)` with `a == b`.
Change-Id: I4e219bea8df64db1d49beb8534f0f37fee0df5b6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60668
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/southbridge/intel/bd82x6x/acpi/pch.asl')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/pch.asl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl index 5a80ab0b3e..51c3c48d86 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl @@ -247,13 +247,13 @@ Method (_OSC, 4) * Arg3 - A Buffer containing a list of DWORD capabilities */ /* Check for XHCI */ - If (LEqual (Arg0, ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71"))) + If (Arg0 == ToUUID("7c9512a9-1705-4cb4-af7d-506a2423ab71")) { Return (^XHC.POSC(Arg2, Arg3)) } /* Check for PCIe */ - If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { /* Let OS control everything */ Return (Arg3) |