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authorYinghai Lu <yinghailu@gmail.com>2006-02-16 17:22:19 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-02-16 17:22:19 +0000
commitafd34e61ace6476946f9f30af92e0f714c901013 (patch)
tree82e1e5673992e2150bb87de3f1d5b6ee955b2b36 /src/southbridge/broadcom/bcm5785/bcm5785_sata.c
parent4d5865d3d48259f43a1d78af8107d46c7a3a73f3 (diff)
serverworks HT1000/HT2000, bcm5785/5780 support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2176 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/broadcom/bcm5785/bcm5785_sata.c')
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_sata.c78
1 files changed, 78 insertions, 0 deletions
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_sata.c b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
new file mode 100644
index 0000000000..470bc47c73
--- /dev/null
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_sata.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2005 AMD
+ * by yinghai.lu@amd.com
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <delay.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <arch/io.h>
+#include "bcm5785.h"
+
+
+static void sata_init(struct device *dev)
+{
+
+ uint8_t byte;
+
+ uint8_t *base;
+ uint8_t *mmio;
+ struct resource *res;
+ int i;
+
+ if(!(dev->path.u.pci.devfn & 7)) { // only set it in Func0
+ byte = pci_read_config8(dev, 0x78);
+ byte |= (1<<7);
+ pci_write_config8(dev, 0x78, byte);
+
+ res = find_resource(dev, 0x24);
+ base = res->base;
+ //init PHY
+
+ printk_debug("init PHY...\n");
+ for(i=0; i<4; i++) {
+ mmio = base + 0x100 * i;
+ byte = readb(mmio + 0x40);
+ printk_debug("port %d PHY status = %02x\r\n", i, byte);
+ if(byte & 0x4) {// bit 2 is set
+ byte = readb(mmio+0x48);
+ writeb(byte | 1, mmio + 0x48);
+ writeb(byte & (~1), mmio + 0x48);
+ byte = readb(mmio + 0x40);
+ printk_debug("after reset port %d PHY status = %02x\r\n", i, byte);
+ }
+ }
+
+ }
+
+
+}
+
+static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+ pci_write_config32(dev, 0x40,
+ ((device & 0xffff) << 16) | (vendor & 0xffff));
+}
+static struct pci_operations lops_pci = {
+ .set_subsystem = lpci_set_subsystem,
+};
+
+static struct device_operations sata_ops = {
+ .read_resources = pci_dev_read_resources,
+ .set_resources = pci_dev_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+// .enable = bcm5785_enable,
+ .init = sata_init,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
+};
+
+static struct pci_driver sata0_driver __pci_driver = {
+ .ops = &sata_ops,
+ .vendor = PCI_VENDOR_ID_SERVERWORKS,
+ .device = PCI_DEVICE_ID_SERVERWORKS_BCM5785_SATA,
+};
+