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authorMichał Żygowski <michal.zygowski@3mdeb.com>2019-11-24 13:26:10 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-29 08:59:43 +0000
commitf3db2aea85623cbbacdeb29cd175005cfdb05189 (patch)
tree43eedfb4b30ceae3a2384b31b10d0b355804023a /src/southbridge/amd
parentc1abf137ffd959318b9fdd33b7276f12c32aa19f (diff)
sb/amd/{agesa,pi}/hudson: enable support for AMD common ACPIMMIO blocks
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Idd014f1ba85efff0c98a0c5ab60d775ac93cbc60 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd')
-rw-r--r--src/southbridge/amd/agesa/hudson/Kconfig3
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.c26
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.h5
-rw-r--r--src/southbridge/amd/agesa/hudson/lpc.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/smi.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/smi.h20
-rw-r--r--src/southbridge/amd/agesa/hudson/smi_util.c5
-rw-r--r--src/southbridge/amd/agesa/hudson/smihandler.c1
-rw-r--r--src/southbridge/amd/pi/hudson/Kconfig3
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.c21
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.h5
-rw-r--r--src/southbridge/amd/pi/hudson/lpc.c1
-rw-r--r--src/southbridge/amd/pi/hudson/smi.c1
-rw-r--r--src/southbridge/amd/pi/hudson/smi.h20
-rw-r--r--src/southbridge/amd/pi/hudson/smi_util.c5
-rw-r--r--src/southbridge/amd/pi/hudson/smihandler.c1
16 files changed, 20 insertions, 99 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index 394a19697a..93db1a920c 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -27,6 +27,9 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_USBDEBUG_OPTIONS
select HAVE_CF9_RESET
select HAVE_CF9_RESET_PREPARE
+ select SOC_AMD_COMMON
+ select SOC_AMD_COMMON_BLOCK
+ select SOC_AMD_COMMON_BLOCK_ACPIMMIO
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 4c06e87281..d586d33f73 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/mmio.h>
#include <device/device.h>
@@ -25,31 +26,6 @@
#include "smbus.h"
#include "smi.h"
-/* Offsets from ACPI_MMIO_BASE
- * This is defined by AGESA, but we don't include AGESA headers to avoid
- * polluting the namespace.
- */
-#define PM_MMIO_BASE 0xfed80300
-
-void pm_write8(u8 reg, u8 value)
-{
- write8((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
-}
-
-u8 pm_read8(u8 reg)
-{
- return read8((void *)((uintptr_t)PM_MMIO_BASE + reg));
-}
-
-void pm_write16(u8 reg, u16 value)
-{
- write16((void *)((uintptr_t)PM_MMIO_BASE + reg), value);
-}
-
-u16 pm_read16(u16 reg)
-{
- return read16((void *)((uintptr_t)PM_MMIO_BASE + reg));
-}
#define PM_REG_USB_ENABLE 0xef
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h
index 21a2129a5c..18303fc5cb 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.h
+++ b/src/southbridge/amd/agesa/hudson/hudson.h
@@ -61,11 +61,6 @@ static inline int hudson_ide_enable(void)
return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
}
-void pm_write8(u8 reg, u8 value);
-u8 pm_read8(u8 reg);
-void pm_write16(u8 reg, u16 value);
-u16 pm_read16(u16 reg);
-
void hudson_lpc_port80(void);
void hudson_pci_port80(void);
void hudson_clk_output_48Mhz(void);
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index eed1aec2e3..9c65d04729 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c
index f8196b4e65..7f76cd59d0 100644
--- a/src/southbridge/amd/agesa/hudson/smi.c
+++ b/src/southbridge/amd/agesa/hudson/smi.c
@@ -18,6 +18,7 @@
* Utilities for SMM setup
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/amd/agesa/hudson/smi.h b/src/southbridge/amd/agesa/hudson/smi.h
index 5e0c09a8e0..b1156a8e1f 100644
--- a/src/southbridge/amd/agesa/hudson/smi.h
+++ b/src/southbridge/amd/agesa/hudson/smi.h
@@ -47,26 +47,6 @@ enum smi_lvl {
SMI_LVL_HIGH = 1,
};
-static inline uint32_t smi_read32(uint8_t offset)
-{
- return read32((void *)((uintptr_t)SMI_BASE + offset));
-}
-
-static inline void smi_write32(uint8_t offset, uint32_t value)
-{
- write32((void *)((uintptr_t)SMI_BASE + offset), value);
-}
-
-static inline uint16_t smi_read16(uint8_t offset)
-{
- return read16((void *)((uintptr_t)SMI_BASE + offset));
-}
-
-static inline void smi_write16(uint8_t offset, uint16_t value)
-{
- write16((void *)((uintptr_t)SMI_BASE + offset), value);
-}
-
void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);
diff --git a/src/southbridge/amd/agesa/hudson/smi_util.c b/src/southbridge/amd/agesa/hudson/smi_util.c
index 63bce7b071..80329541a8 100644
--- a/src/southbridge/amd/agesa/hudson/smi_util.c
+++ b/src/southbridge/amd/agesa/hudson/smi_util.c
@@ -18,10 +18,11 @@
* SMM utilities used in both SMM and normal mode
*/
-#include "smi.h"
-
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
+#include "smi.h"
+
#define HUDSON_SMI_ACPI_COMMAND 75
static void configure_smi(uint8_t smi_num, uint8_t mode)
diff --git a/src/southbridge/amd/agesa/hudson/smihandler.c b/src/southbridge/amd/agesa/hudson/smihandler.c
index 6ecb7462f0..1b60f18652 100644
--- a/src/southbridge/amd/agesa/hudson/smihandler.c
+++ b/src/southbridge/amd/agesa/hudson/smihandler.c
@@ -18,6 +18,7 @@
* SMI handler for Hudson southbridges
*/
+#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index c636df8c13..01f3937321 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -30,6 +30,9 @@ config SOUTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_USBDEBUG_OPTIONS
select HAVE_CF9_RESET
select HAVE_CF9_RESET_PREPARE
+ select SOC_AMD_COMMON
+ select SOC_AMD_COMMON_BLOCK
+ select SOC_AMD_COMMON_BLOCK_ACPIMMIO
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index a331c57262..51c37a1ca0 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <arch/io.h>
#include <device/mmio.h>
@@ -36,26 +37,6 @@ int acpi_get_sleep_type(void)
return (int)tmp;
}
-void pm_write8(u8 reg, u8 value)
-{
- write8((void *)(PM_MMIO_BASE + reg), value);
-}
-
-u8 pm_read8(u8 reg)
-{
- return read8((void *)(PM_MMIO_BASE + reg));
-}
-
-void pm_write16(u8 reg, u16 value)
-{
- write16((void *)(PM_MMIO_BASE + reg), value);
-}
-
-u16 pm_read16(u16 reg)
-{
- return read16((void *)(PM_MMIO_BASE + reg));
-}
-
void hudson_enable(struct device *dev)
{
printk(BIOS_DEBUG, "hudson_enable()\n");
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h
index 9511a6ad24..b24629f0a1 100644
--- a/src/southbridge/amd/pi/hudson/hudson.h
+++ b/src/southbridge/amd/pi/hudson/hudson.h
@@ -169,11 +169,6 @@ static inline int hudson_ide_enable(void)
return (CONFIG_HUDSON_SATA_MODE == 0) || (CONFIG_HUDSON_SATA_MODE == 3);
}
-void pm_write8(u8 reg, u8 value);
-u8 pm_read8(u8 reg);
-void pm_write16(u8 reg, u16 value);
-u16 pm_read16(u16 reg);
-
void hudson_lpc_port80(void);
void hudson_lpc_decode(void);
void hudson_pci_port80(void);
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index e65fd838b0..6c3561f0c3 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/amd/pi/hudson/smi.c b/src/southbridge/amd/pi/hudson/smi.c
index f8196b4e65..7f76cd59d0 100644
--- a/src/southbridge/amd/pi/hudson/smi.c
+++ b/src/southbridge/amd/pi/hudson/smi.c
@@ -18,6 +18,7 @@
* Utilities for SMM setup
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/amd/pi/hudson/smi.h b/src/southbridge/amd/pi/hudson/smi.h
index 684dca51c2..4faee1512f 100644
--- a/src/southbridge/amd/pi/hudson/smi.h
+++ b/src/southbridge/amd/pi/hudson/smi.h
@@ -47,26 +47,6 @@ enum smi_lvl {
SMI_LVL_HIGH = 1,
};
-static inline uint32_t smi_read32(uint8_t offset)
-{
- return read32((void *)(SMI_BASE + offset));
-}
-
-static inline void smi_write32(uint8_t offset, uint32_t value)
-{
- write32((void *)(SMI_BASE + offset), value);
-}
-
-static inline uint16_t smi_read16(uint8_t offset)
-{
- return read16((void *)(SMI_BASE + offset));
-}
-
-static inline void smi_write16(uint8_t offset, uint16_t value)
-{
- write16((void *)(SMI_BASE + offset), value);
-}
-
void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);
diff --git a/src/southbridge/amd/pi/hudson/smi_util.c b/src/southbridge/amd/pi/hudson/smi_util.c
index 63bce7b071..80329541a8 100644
--- a/src/southbridge/amd/pi/hudson/smi_util.c
+++ b/src/southbridge/amd/pi/hudson/smi_util.c
@@ -18,10 +18,11 @@
* SMM utilities used in both SMM and normal mode
*/
-#include "smi.h"
-
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
+#include "smi.h"
+
#define HUDSON_SMI_ACPI_COMMAND 75
static void configure_smi(uint8_t smi_num, uint8_t mode)
diff --git a/src/southbridge/amd/pi/hudson/smihandler.c b/src/southbridge/amd/pi/hudson/smihandler.c
index 6ecb7462f0..1b60f18652 100644
--- a/src/southbridge/amd/pi/hudson/smihandler.c
+++ b/src/southbridge/amd/pi/hudson/smihandler.c
@@ -18,6 +18,7 @@
* SMI handler for Hudson southbridges
*/
+#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <cpu/x86/smm.h>