sb/amd/sb800: Drop support

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which platforms using this code lack.

Change-Id: I1c25837f1ba05ecd58309b63a471001f4aee2fff
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36968
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 0 insertions, 31 deletions

diff --git a/src/southbridge/amd/sb800/reset.c b/src/southbridge/amd/sb800/reset.c
deleted file mode 100644
index bd578b6c0d..0000000000
--- a/src/southbridge/amd/sb800/reset.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-// Use simple device model for this file even in ramstage
-#define __SIMPLE_DEVICE__
-
-#include <arch/io.h>
-#include <reset.h>
-
-#include <northbridge/amd/amdk8/reset_test.c>
-
-void do_board_reset(void)
-{
-	set_bios_reset();
-	/* Try rebooting through port 0xcf9 */
-	/* Actually it is not a real hard_reset --- it only reset coherent link table, but not reset link freq and width */
-	outb((0 << 3) | (0 << 2) | (1 << 1), 0xcf9);
-	outb((0 << 3) | (1 << 2) | (1 << 1), 0xcf9);
-}