diff options
| author | Martin Roth <martinroth@google.com> | 2015-08-18 10:41:54 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-08-25 17:36:45 +0000 |
| commit | df205067c976d917563a02fc6ebf1cff329a4097 (patch) | |
| tree | 325c4cf09361bada19aee32c8fdf009aabd4e641 /src/southbridge/amd/rs780/pcie.c | |
| parent | 1fff0d26f80c9f412a500f40b29bbbd88572febc (diff) | |
Intel: Remove CACHE_MRC_BIN - 'selected' everywhere in Kconfig
The Kconfig symbol CACHE_MRC_BIN was getting forced enabled everywhere
it existed.
Remove the Kconfig symbol and get rid of the #if statements
surrounding the code.
This fixes the Kconfig warning for Haswell & Broadwell chips:
warning: (NORTHBRIDGE_INTEL_HASWELL &&
NORTHBRIDGE_INTEL_SANDYBRIDGE &&
NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE &&
NORTHBRIDGE_INTEL_IVYBRIDGE &&
NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE &&
CPU_SPECIFIC_OPTIONS) selects CACHE_MRC_BIN
which has unmet direct dependencies
(CPU_INTEL_SOCKET_RPGA988B || CPU_INTEL_SOCKET_RPGA989)
Change-Id: Ie0f0726e3d6f217e2cb3be73034405081ce0735a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11270
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/rs780/pcie.c')
0 files changed, 0 insertions, 0 deletions