diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-16 20:52:23 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-17 17:03:08 +0100 |
| commit | a9e3a756fe7a68c1839dd5a33b3aa03ca1224327 (patch) | |
| tree | bcac8ba7e7d415493b9fe6265518f7eee1da74d6 /src/southbridge/amd/rs780/early_setup.c | |
| parent | 3c3a50c3c4144a393b4183d4e57ae9c7c2d8cc53 (diff) | |
southbridge/amd rs690 & rs780 spelling fixes
Trivial fixes, but the editor highlights them, and it's easy to go
through a bunch of files while I'm otherwise idle.
Change-Id: I5a5af71ea49152accd92dc331a19e57f3717e4ff
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7841
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd/rs780/early_setup.c')
| -rw-r--r-- | src/southbridge/amd/rs780/early_setup.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c index a36112bebb..d35ecddf14 100644 --- a/src/southbridge/amd/rs780/early_setup.c +++ b/src/southbridge/amd/rs780/early_setup.c @@ -256,17 +256,17 @@ static void rs780_htinit(void) set_htiu_enable_bits(rs780_f0, 0x2A, 0x3, 0x1); /* Enables error-retry mode */ set_nbcfg_enable_bits(rs780_f0, 0x44, 0x1, 0x1); - /* Enables scrambling and Disalbes command throttling */ + /* Enables scrambling and Disables command throttling */ set_nbcfg_enable_bits(rs780_f0, 0xac, (1 << 3) | (1 << 14), (1 << 3) | (1 << 14)); /* Enables transmitter de-emphasis */ set_nbcfg_enable_bits(rs780_f0, 0xa4, 1 << 31, 1 << 31); - /* Enabels transmitter de-emphasis level */ + /* Enables transmitter de-emphasis level */ /* Sets training 0 time */ set_nbcfg_enable_bits(rs780_f0, 0xa0, 0x3F, 0x14); /* Enables strict TM4 detection */ set_htiu_enable_bits(rs780_f0, 0x15, 0x1 << 22, 0x1 << 22); - /* Enables proprer DLL reset sequence */ + /* Enables proper DLL reset sequence */ set_htiu_enable_bits(rs780_f0, 0x16, 0x1 << 10, 0x1 << 10); /* HyperTransport 3 Processor register settings to be done in northbridge */ |