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authorBora Guvendik <bora.guvendik@intel.com>2020-08-28 10:50:47 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-10-14 05:36:57 +0000
commit7377cda6089210068b9d163083e6084439aa3e88 (patch)
tree40a80d14ab3d0ca3a51e93205896b1920b6fa5cc /src/southbridge/amd/pi
parentd1095c7ed79d7bed958c6e446fe4ea2def5c2102 (diff)
mb/intel/tglrvp: Enable Pcie WWAN m.2
Enables Pcie M.2 support for WWAN and disable M.2 USB. RP4 is already on and PcieRpEnable[3] is enabled. Clock source 2 is already configured. Added missing gpio configuration. BUG=none TEST=Boot to OS, check WWAN functionality Change-Id: Ie9b7915062b2ef65d881d478e64322c0b8765614 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45828 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/pi')
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