diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-08 17:02:23 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-10 14:47:23 +0000 |
| commit | 74beb5de844e054dc1a08169e6cccaf53e04c5db (patch) | |
| tree | ab3e922f11e84a1856dd7a59d64d535f6bd90d98 /src/southbridge/amd/pi/hudson/smihandler.c | |
| parent | 3fc1f0667fb578f7b5c633577f0491802f03152c (diff) | |
sb/amd/pi/hudson/smhandler: use common APM_CNT_ACPI_* defines
The Hudson southbridge code for the AMD binaryPI SoCs had its own ACPI
enable and disable APMC command numbers that didn't match the common
defines in coreboot, so use the common define here to be consistent with
the command numbers in the corresponding FADT fields. Since the only SoC
that still would use this code doesn't select HAVE_SMI_HANDLER, this
won't fix any observable bug, but better fix this before anyone possibly
runs into this.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5e596071e1b5269b616b7a93151648cb86ae77bc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/smihandler.c')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/smihandler.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/pi/hudson/smihandler.c b/src/southbridge/amd/pi/hudson/smihandler.c index 429d07a4c7..966550fd88 100644 --- a/src/southbridge/amd/pi/hudson/smihandler.c +++ b/src/southbridge/amd/pi/hudson/smihandler.c @@ -28,12 +28,12 @@ static void hudson_apmc_smi_handler(void) const uint8_t cmd = inb(ACPI_SMI_CTL_PORT); switch (cmd) { - case ACPI_SMI_CMD_ENABLE: + case APM_CNT_ACPI_ENABLE: reg32 = inl(ACPI_PM1_CNT_BLK); reg32 |= (1 << 0); /* SCI_EN */ outl(reg32, ACPI_PM1_CNT_BLK); break; - case ACPI_SMI_CMD_DISABLE: + case APM_CNT_ACPI_DISABLE: reg32 = inl(ACPI_PM1_CNT_BLK); reg32 &= ~(1 << 0); /* clear SCI_EN */ outl(ACPI_PM1_CNT_BLK, reg32); |