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authorFelix Held <felix-coreboot@felixheld.de>2024-01-08 17:02:23 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-01-10 14:47:23 +0000
commit74beb5de844e054dc1a08169e6cccaf53e04c5db (patch)
treeab3e922f11e84a1856dd7a59d64d535f6bd90d98 /src/southbridge/amd/pi/hudson/hudson.h
parent3fc1f0667fb578f7b5c633577f0491802f03152c (diff)
sb/amd/pi/hudson/smhandler: use common APM_CNT_ACPI_* defines
The Hudson southbridge code for the AMD binaryPI SoCs had its own ACPI enable and disable APMC command numbers that didn't match the common defines in coreboot, so use the common define here to be consistent with the command numbers in the corresponding FADT fields. Since the only SoC that still would use this code doesn't select HAVE_SMI_HANDLER, this won't fix any observable bug, but better fix this before anyone possibly runs into this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5e596071e1b5269b616b7a93151648cb86ae77bc Reviewed-on: https://review.coreboot.org/c/coreboot/+/79848 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/hudson.h')
-rw-r--r--src/southbridge/amd/pi/hudson/hudson.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h
index 510cdd0e32..96a5367a44 100644
--- a/src/southbridge/amd/pi/hudson/hudson.h
+++ b/src/southbridge/amd/pi/hudson/hudson.h
@@ -45,8 +45,6 @@
#define ACPI_SCI_IRQ 9
#define ACPI_SMI_CTL_PORT 0xb2
-#define ACPI_SMI_CMD_DISABLE 0xbe
-#define ACPI_SMI_CMD_ENABLE 0xef
#define REV_HUDSON_A11 0x11
#define REV_HUDSON_A12 0x12