diff options
| author | Zheng Bao <fishbaozi@gmail.com> | 2015-11-21 12:19:22 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-24 20:57:47 +0100 |
| commit | 22861385613e34a16ef745917f6956a92243d88b (patch) | |
| tree | 4994983a5acc00de8340ff9cb260bdf2cc3b66f7 /src/southbridge/amd/pi/hudson/Kconfig | |
| parent | ab1e77fb01df5315fc291a801ca60db2582a111d (diff) | |
AMD/bettong: Add UART support
The function delay in uart8250mem.c is not enough for hudson. I guess
there are some problems in lapic_timer(). I uploaded a patch to gerrit
to show the way to enable UART feature.
http://review.coreboot.org/#/c/12343/4
Currently the HUDSON_UART is unchecked by default. Select HUDSON_UART to
enable this feature.
The UART is test at BIOS stage.
Since it is not a standart UART device, the windows internal UART driver
doesnt support it. I guess we need a driver to use it on windows.
Change-Id: I4cec833cc2ff8069c82886837f7cbd4483ff11bb
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11749
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/pi/hudson/Kconfig')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/Kconfig | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig index c720791a83..94a313d19d 100644 --- a/src/southbridge/amd/pi/hudson/Kconfig +++ b/src/southbridge/amd/pi/hudson/Kconfig @@ -227,3 +227,19 @@ config AZ_PIN bit 5,4 - pin 2 bit 7,6 - pin 3 endif + +config HUDSON_UART + bool "UART controller on Kern." + default n + depends on SOUTHBRIDGE_AMD_PI_KERN + select DRIVERS_UART_8250MEM + select DRIVERS_UART_8250MEM_32 + select NO_UART_ON_SUPERIO + help + There are two UART controllers in Kern. + The UART registers are memory-mapped. UART + controller 0 registers range from FEDC_6000h + to FEDC_6FFFh. UART controller 1 registers + range from FEDC_8000h to FEDC_8FFFh. + + |