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authorLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:31:47 +0000
committerLi-Ta Lo <ollie@lanl.gov>2006-04-20 21:31:47 +0000
commit5d69896c8728d02b7c25f13192b3266b792312e1 (patch)
tree2f5efcff1ac2d42445f7e989fa6c5985fa5743ec /src/southbridge/amd/cs5536/cs5536_early_smbus.c
parent05c0869fac22cae8a35897310fef64ad94caed01 (diff)
add cs5536
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5536/cs5536_early_smbus.c')
-rw-r--r--src/southbridge/amd/cs5536/cs5536_early_smbus.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5536/cs5536_early_smbus.c b/src/southbridge/amd/cs5536/cs5536_early_smbus.c
new file mode 100644
index 0000000000..0605d0cb82
--- /dev/null
+++ b/src/southbridge/amd/cs5536/cs5536_early_smbus.c
@@ -0,0 +1,45 @@
+#include "cs5536_smbus.h"
+
+#define SMBUS_IO_BASE 0x6000
+
+/* initialization for SMBus Controller */
+static int cs5536_enable_smbus(void)
+{
+ unsigned char val;
+
+ /* reset SMBUS controller */
+ outb(0, SMBUS_IO_BASE + SMB_CTRL2);
+
+ /* Set SCL freq and enable SMB controller */
+ val = inb(SMBUS_IO_BASE + SMB_CTRL2);
+ val |= ((0x20 << 1) | SMB_CTRL2_ENABLE);
+ outb(val, SMBUS_IO_BASE + SMB_CTRL2);
+
+ /* Setup SMBus host controller address to 0xEF */
+ val = inb(SMBUS_IO_BASE + SMB_ADD);
+ val |= (0xEF | SMB_ADD_SAEN);
+ outb(val, SMBUS_IO_BASE + SMB_ADD);
+}
+
+static int smbus_read_byte(unsigned device, unsigned address)
+{
+ return do_smbus_read_byte(SMBUS_IO_BASE, device, address-1);
+}
+
+#if 0
+static int smbus_recv_byte(unsigned device)
+{
+ return do_smbus_recv_byte(SMBUS_IO_BASE, device);
+}
+
+static int smbus_send_byte(unsigned device, unsigned char val)
+{
+ return do_smbus_send_byte(SMBUS_IO_BASE, device, val);
+}
+
+
+static int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
+{
+ return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val);
+}
+#endif