diff options
author | Ronald G. Minnich <rminnich@gmail.com> | 2006-01-27 23:46:30 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-01-27 23:46:30 +0000 |
commit | 2bb216a880d2358c25b305ce613d8dd5aecd90ac (patch) | |
tree | fd3a00201840659c994d6d0c32df280cb268e91c /src/southbridge/amd/cs5535/chip.h | |
parent | 05c743a5ebf715f788a62fded7e9896e6e6c6d63 (diff) |
adding preliminary, and almost certainly wrong, rumba support.
This is just a skeleton, basically, and will most likely not even
compile yet.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2164 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/cs5535/chip.h')
-rw-r--r-- | src/southbridge/amd/cs5535/chip.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/southbridge/amd/cs5535/chip.h b/src/southbridge/amd/cs5535/chip.h new file mode 100644 index 0000000000..07a3907f3f --- /dev/null +++ b/src/southbridge/amd/cs5535/chip.h @@ -0,0 +1,12 @@ +#ifndef _SOUTHBRIDGE_AMD_CS5535 +#define _SOUTHBRIDGE_AMD_CS5535 + +extern struct chip_operations southbridge_amd_cs5535_ops; + +struct southbridge_amd_cs5535_config { + /* PCI function enables so the pci scan bus finds the devices */ + int enable_ide; + int enable_nvram; +}; + +#endif /* _SOUTHBRIDGE_AMD_CS5535 */ |