diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-07-16 09:50:29 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-18 11:21:35 +0000 |
| commit | 616be8cd1fbdfa77caa02fa77eabe7b9edc9dc36 (patch) | |
| tree | 60dc7c808877a1e60a173b25f2558fa97c5bb96e /src/southbridge/amd/cimx/sb800/late.c | |
| parent | 4d7285df1d3c7e48100ed39b030b67a7bcf07d0e (diff) | |
sb/amd/cimx: Fix some white spaces issues
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Iba81be8ec48fa744f3263e340267a56158656a8f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/late.c')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index da2c5ab88a..88e426a1c5 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -88,7 +88,7 @@ static void ahci_raid_init(struct device *dev) caps = read32(bar5 + HOST_CAP); caps = (caps & 0x1F) + 1; - ports= read32(bar5 + HOST_PORTS_IMPL); + ports = read32(bar5 + HOST_PORTS_IMPL); printk(BIOS_DEBUG, "Number of Ports: 0x%x, Port implemented(bit map): 0x%x\n", caps, ports); /* make sure ahci is enabled */ @@ -382,7 +382,7 @@ static void sb800_enable(struct device *dev) { struct device *device; for (device = dev; device; device = device->sibling) { - if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15,0)) break; + if ((device->path.pci.devfn & ~3) != PCI_DEVFN(0x15, 0)) break; sb_config->PORTCONFIG[device->path.pci.devfn & 3].PortCfg.PortPresent = device->enabled; } |