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author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-06-18 01:17:38 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-07-30 05:17:16 +0200 |
commit | 12bce3ff93334c14f388eea606a530737c5d9d21 (patch) | |
tree | 094d67872bf8f6959e349d34d9d9c38742dfa654 /src/southbridge/amd/cimx/sb800/gpio_oem.h | |
parent | 221761e0be8fbf5ae5cae827216ae0e92c05c3af (diff) |
SB800: Port to 64bit
Change-Id: I944fb254e9470c80b13c9eef9d6b1177a56e615f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/10582
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/gpio_oem.h')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/gpio_oem.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/cimx/sb800/gpio_oem.h b/src/southbridge/amd/cimx/sb800/gpio_oem.h index a9f59e3a31..e2c81fc3f7 100644 --- a/src/southbridge/amd/cimx/sb800/gpio_oem.h +++ b/src/southbridge/amd/cimx/sb800/gpio_oem.h @@ -11,9 +11,9 @@ #define SB_GPIO_REG28 28 /* FCH GPIO access helpers */ -#define FCH_IOMUX(gpio_nr) (*(u8*)(ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr))) -#define FCH_PMIO(reg_nr) (*(u8*)(ACPI_MMIO_BASE+PMIO_BASE+(reg_nr))) -#define FCH_GPIO(gpio_nr) (*(volatile u8*)(ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr))) +#define FCH_IOMUX(gpio_nr) (*(u8*)((uintptr_t)ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr))) +#define FCH_PMIO(reg_nr) (*(u8*)((uintptr_t)ACPI_MMIO_BASE+PMIO_BASE+(reg_nr))) +#define FCH_GPIO(gpio_nr) (*(volatile u8*)((uintptr_t)ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr))) static inline u8 fch_gpio_state(unsigned int gpio_nr) { |