From 12bce3ff93334c14f388eea606a530737c5d9d21 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 18 Jun 2015 01:17:38 -0700 Subject: SB800: Port to 64bit Change-Id: I944fb254e9470c80b13c9eef9d6b1177a56e615f Signed-off-by: Stefan Reinauer Signed-off-by: Scott Duplichan Reviewed-on: http://review.coreboot.org/10582 Reviewed-by: Alexandru Gagniuc Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand --- src/southbridge/amd/cimx/sb800/gpio_oem.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/southbridge/amd/cimx/sb800/gpio_oem.h') diff --git a/src/southbridge/amd/cimx/sb800/gpio_oem.h b/src/southbridge/amd/cimx/sb800/gpio_oem.h index a9f59e3a31..e2c81fc3f7 100644 --- a/src/southbridge/amd/cimx/sb800/gpio_oem.h +++ b/src/southbridge/amd/cimx/sb800/gpio_oem.h @@ -11,9 +11,9 @@ #define SB_GPIO_REG28 28 /* FCH GPIO access helpers */ -#define FCH_IOMUX(gpio_nr) (*(u8*)(ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr))) -#define FCH_PMIO(reg_nr) (*(u8*)(ACPI_MMIO_BASE+PMIO_BASE+(reg_nr))) -#define FCH_GPIO(gpio_nr) (*(volatile u8*)(ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr))) +#define FCH_IOMUX(gpio_nr) (*(u8*)((uintptr_t)ACPI_MMIO_BASE+IOMUX_BASE+(gpio_nr))) +#define FCH_PMIO(reg_nr) (*(u8*)((uintptr_t)ACPI_MMIO_BASE+PMIO_BASE+(reg_nr))) +#define FCH_GPIO(gpio_nr) (*(volatile u8*)((uintptr_t)ACPI_MMIO_BASE+GPIO_BASE+(gpio_nr))) static inline u8 fch_gpio_state(unsigned int gpio_nr) { -- cgit v1.2.3