diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-07-16 09:50:29 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-18 11:21:35 +0000 |
| commit | 616be8cd1fbdfa77caa02fa77eabe7b9edc9dc36 (patch) | |
| tree | 60dc7c808877a1e60a173b25f2558fa97c5bb96e /src/southbridge/amd/cimx/sb800/bootblock.c | |
| parent | 4d7285df1d3c7e48100ed39b030b67a7bcf07d0e (diff) | |
sb/amd/cimx: Fix some white spaces issues
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Iba81be8ec48fa744f3263e340267a56158656a8f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/bootblock.c')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/bootblock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c index 9ac67f3dff..636e5a8eec 100644 --- a/src/southbridge/amd/cimx/sb800/bootblock.c +++ b/src/southbridge/amd/cimx/sb800/bootblock.c @@ -55,7 +55,7 @@ static void enable_spi_fast_mode(void) // set temp MMIO base volatile u32 *spi_base = (void *)0xa0000000; u32 save = pci_s_read_config32(dev, 0xa0); - pci_s_write_config32(dev, 0xa0, (u32) spi_base | 2); + pci_s_write_config32(dev, 0xa0, (u32)spi_base | 2); // early enable of SPI 33 MHz fast mode read dword = spi_base[3]; |