diff options
| author | Kerry Sheh <shekairui@gmail.com> | 2012-02-07 20:31:40 +0800 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2012-02-16 22:31:53 +0100 |
| commit | 131c936b45a4f0d3a1aaaf0165faffc8a7cd72c6 (patch) | |
| tree | 9c22dc09a64513e58211c7df682b8f90962ba92e /src/southbridge/amd/cimx/sb700/Kconfig | |
| parent | 6811f75457148cc0d3b0cb4832fda712e7797af2 (diff) | |
SB700 southbridge: AMD SB700/SP5100 southbridge CIMX wrapper
Change-Id: If924b7eb176e7d3d82fa394929b653b1ced3a743
Signed-off-by: Kerry Sheh <kerry.she@amd.com>
Signed-off-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/561
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb700/Kconfig')
| -rw-r--r-- | src/southbridge/amd/cimx/sb700/Kconfig | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig new file mode 100644 index 0000000000..27338fc63d --- /dev/null +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -0,0 +1,63 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2012 Advanced Micro Devices, Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config SOUTHBRIDGE_AMD_CIMX_SB700 + bool + select IOAPIC + select AMD_SB_CIMX + +if SOUTHBRIDGE_AMD_CIMX_SB700 +config SATA_CONTROLLER_MODE + hex + default 0x0 + help + 0x0 = Native IDE mode. + 0x1 = RAID mode. + 0x2 = AHCI mode. + 0x3 = Legacy IDE mode. + 0x4 = IDE->AHCI mode. + 0x5 = AHCI mode as 7804 ID (AMD driver). + 0x6 = IDE->AHCI mode as 7804 ID (AMD driver). + +config PCIB_ENABLE + bool + default n + help + n = Disable PCI Bridge Device 14 Function 4. + y = Enable PCI Bridge Device 14 Function 4. + +config ACPI_SCI_IRQ + hex + default 0x9 + help + Set SCI IRQ to 9. +config BOOTBLOCK_SOUTHBRIDGE_INIT + string + default "southbridge/amd/cimx/sb700/bootblock.c" + +config REDIRECT_SBCIMX_TRACE_TO_SERIAL + bool "Redirect AMD Southbridge CIMX Trace to serial console" + default n + help + This Option allows you to redirect the AMD Southbridge CIMX Trace + debug information to the serial console. + + Warning: Only enable this option when debuging or tracing AMD CIMX code. +endif #SOUTHBRIDGE_AMD_CIMX_SB700 + |