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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-05 06:33:32 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-06 20:44:12 +0100
commit8db31a8f4eb247df86c658acb4cb7c5f97456e68 (patch)
treeb0d58cacb3174a50919cf11e8f751cec61261069 /src/southbridge/amd/amd8111
parentb4a45dcf9d442b311dec7396a55be917713a0d15 (diff)
PCI ops: Remove conflicting duplicate declarations
The code originates from times before __SIMPLE_DEVICE__ was introduced. To keep behaviour unchanged, use explicit PCI IO operations here. Change-Id: I44851633115f9aee4c308fd3711571a4b14c5f2f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17720 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/reset.c56
1 files changed, 20 insertions, 36 deletions
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
index 3cc1a0a5d3..fd2c82ab5b 100644
--- a/src/southbridge/amd/amd8111/reset.c
+++ b/src/southbridge/amd/amd8111/reset.c
@@ -1,48 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#define __SIMPLE_DEVICE__
+
#include <arch/io.h>
#include <reset.h>
#include <device/pci_ids.h>
-#define PCI_DEV(BUS, DEV, FN) ( \
- (((BUS) & 0xFFF) << 20) | \
- (((DEV) & 0x1F) << 15) | \
- (((FN) & 0x7) << 12))
-
-#define PCI_ID(VENDOR_ID, DEVICE_ID) \
- ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
-
-static void pci_write_config8(pci_devfn_t dev, unsigned where, unsigned char value)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outb(value, 0xCFC + (addr & 3));
-}
-
-static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outl(value, 0xCFC);
-}
-
-static unsigned pci_read_config32(pci_devfn_t dev, unsigned where)
-{
- unsigned addr;
- addr = (dev>>4) | where;
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inl(0xCFC);
-}
#define PCI_DEV_INVALID (0xffffffffU)
-static pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
+static pci_devfn_t pci_io_locate_device_on_bus(unsigned pci_id, unsigned bus)
{
pci_devfn_t dev, last;
dev = PCI_DEV(bus, 0, 0);
last = PCI_DEV(bus, 31, 7);
for (; dev <= last; dev += PCI_DEV(0,0,1)) {
unsigned int id;
- id = pci_read_config32(dev, 0);
+ id = pci_io_read_config32(dev, 0);
if (id == pci_id) {
return dev;
}
@@ -52,7 +37,6 @@ static pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
#include "../../../northbridge/amd/amdk8/reset_test.c"
-
void hard_reset(void)
{
pci_devfn_t dev;
@@ -64,11 +48,11 @@ void hard_reset(void)
* There can only be one 8111 on a hypertransport chain/bus.
*/
bus = node_link_to_bus(node, link);
- dev = pci_locate_device_on_bus(
+ dev = pci_io_locate_device_on_bus(
PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA),
bus);
/* Reset */
set_bios_reset();
- pci_write_config8(dev, 0x47, 1);
+ pci_io_write_config8(dev, 0x47, 1);
}