diff options
author | Eric Biederman <ebiederm@xmission.com> | 2003-05-19 19:16:21 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2003-05-19 19:16:21 +0000 |
commit | 526855741b6abb970024366316b941fb6b3d2cb6 (patch) | |
tree | 7da1560ec08c513a23b23704cae3637925e5bd68 /src/southbridge/amd/amd8111/amd8111_ide.c | |
parent | 49cf5967ce31af37e61d59a00939f50bc4256761 (diff) |
- Cleanups on the romcc side including a pci interface that uses
fewer registers, and is easier to hardcode.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8111/amd8111_ide.c')
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_ide.c | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_ide.c b/src/southbridge/amd/amd8111/amd8111_ide.c new file mode 100644 index 0000000000..f351606989 --- /dev/null +++ b/src/southbridge/amd/amd8111/amd8111_ide.c @@ -0,0 +1,65 @@ +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> + +static void ide_init(struct device *dev) +{ + + /* Enable ide devices so the linux ide driver will work */ + uint16_t word; + int enable_a=1, enable_b=1; + + + printk_debug("ide_init\n"); + + pci_read_config_word(dev, 0x40, &word); + /* Ensure prefetch is disabled */ + word &= ~((1 << 15) | (1 << 13)); + if (enable_b) { + /* Enable secondary ide interface */ + word |= (1<<0); + printk_debug("IDE1 "); + } + if (enable_a) { + /* Enable primary ide interface */ + word |= (1<<1); + printk_debug("IDE0 "); + } + + word |= (1<<12); + word |= (1<<14); + + pci_write_config_word(dev, 0x40, word); + + word = 0x0f; + pci_write_config_word(dev, 0x42, word); + + /* The AMD768 has a bug where the BM DMA address must be + * 256 byte aligned while it is only 16 bytes long. + * Hard code this to a valid address below 0x1000 + * where automatic port address assignment starts. + * FIXME: I assume the 8111 does the same thing. We should + * clarify. stepan@suse.de + */ + pci_write_config_dword(dev, 0x20, 0xf01); + + pci_write_config_dword(dev, 0x48, 0x205e5e5e); + word = 0x06a; + pci_write_config_word(dev, 0x4c, word); +} + +static struct device_operations ide_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .init = ide_init, + .scan_bus = 0, +}; + +static struct pci_driver ide_driver __pci_driver = { + .ops = &ide_ops, + .vendor = PCI_VENDOR_ID_AMD, + .device = PCI_DEVICE_ID_AMD_8111_IDE, +}; + |