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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-04-19 07:17:59 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-05-18 10:44:43 +0200
commit08311f5033e3adccb8794b6113d72bf7a76e4d00 (patch)
treeaaf0d1ca6cacf2d5a73e45dc9f9193417a4b10fc /src/southbridge/amd/agesa
parent82171ea0ff9e38462e813b791dd57c8ad95dc768 (diff)
AGESA vendorcode: Build a common amdlib
Having CFLAGS with -Os disables -falign-function, for unlucky builds this may delay entry to ramstage by 600ms. Build the low-level IO functions aligned with -O2 instead. Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14414 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/amd/agesa')
-rw-r--r--src/southbridge/amd/agesa/hudson/imc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
index a077adee8d..4da6814c68 100644
--- a/src/southbridge/amd/agesa/hudson/imc.c
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -18,7 +18,7 @@
#include <delay.h>
#include "Porting.h"
#include "AGESA.h"
-#include <Lib/amdlib.h>
+#include <amdlib.h>
#include <Proc/Fch/Fch.h>
#include <Proc/Fch/Common/FchCommonCfg.h>
#include <Proc/Fch/FchPlatform.h>