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authorZheng Bao <zheng.bao@amd.com>2011-01-20 02:09:24 +0000
committerZheng Bao <Zheng.Bao@amd.com>2011-01-20 02:09:24 +0000
commitdd676ddc54f8d210f9c62a0f6a259dd4482c9b1b (patch)
tree698a611f1d361d0a8f4f3f41c78eb9addbe6939a /src/southbridge/amd/Kconfig
parentc29675f3324db3d4a14b77b1c9d4988cb9a89a0a (diff)
For Cx, each ChipSel need to be sent MR command.
After this patch, tilapia can run in higher memory frequency. To test the high frequency, dont forget to change the freq limit in mcti_d.c: static void mctGet_MaxLoadFreq(struct DCTStatStruc *pDCTstat) { pDCTstat->PresetmaxFreq = 800; } Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6276 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/Kconfig')
0 files changed, 0 insertions, 0 deletions