CBFS: Automate ROM image layout and remove hardcoded offsets

Non-x86 boards currently need to hardcode the position of their CBFS
master header in a Kconfig. This is very brittle because it is usually
put in between the bootblock and the first CBFS entry, without any
checks to guarantee that it won't overlap either of those. It is not fun
to debug random failures that move and disappear with tiny alignment
changes because someone decided to write "ORBC1112" over some part of
your data section (in a way that is not visible in the symbolized .elf
binaries, only in the final image). This patch seeks to prevent those
issues and reduce the need for manual configuration by making the image
layout a completely automated part of cbfstool.

Since automated placement of the CBFS header means we can no longer
hardcode its position into coreboot, this patch takes the existing x86
solution of placing a pointer to the header at the very end of the
CBFS-managed section of the ROM and generalizes it to all architectures.
This is now even possible with the read-only/read-write split in
ChromeOS, since coreboot knows how large that section is from the
CBFS_SIZE Kconfig (which is by default equal to ROM_SIZE, but can be
changed on systems that place other data next to coreboot/CBFS in ROM).

Also adds a feature to cbfstool that makes the -B (bootblock file name)
argument on image creation optional, since we have recently found valid
use cases for CBFS images that are not the first boot medium of the
device (instead opened by an earlier bootloader that can already
interpret CBFS) and therefore don't really need a bootblock.

BRANCH=None
BUG=None
TEST=Built and booted on Veyron_Pinky, Nyan_Blaze and Falco.

Change-Id: Ib715bb8db258e602991b34f994750a2d3e2d5adf
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e9879c0fbd57f105254c54bacb3e592acdcad35c
Original-Change-Id: Ifcc755326832755cfbccd6f0a12104cba28a20af
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229975
Reviewed-on: http://review.coreboot.org/9620
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

8 files changed, 0 insertions, 125 deletions

diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index 46714444a4..9eb001da49 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -35,13 +35,4 @@ config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/imgtec/pistachio/bootblock.c"
 
-config CBFS_ROM_OFFSET
-	hex
-	default 0x8100
-
-config CBFS_HEADER_ROM_OFFSET
-	# Effectively the maximum size of the bootblock
-	hex
-	default 0x8000
-
 endif
diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig
index 1d51ebd94c..d7f8327198 100644
--- a/src/soc/marvell/bg4cd/Kconfig
+++ b/src/soc/marvell/bg4cd/Kconfig
@@ -37,16 +37,4 @@ config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/marvell/bg4cd/bootblock.c"
 
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0x0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex
-	default 0x0008000
-
-config CBFS_ROM_OFFSET
-	hex
-	default 0x0018000
-
 endif
diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig
index 3ce368b95f..b934f4ea17 100644
--- a/src/soc/nvidia/tegra124/Kconfig
+++ b/src/soc/nvidia/tegra124/Kconfig
@@ -24,18 +24,6 @@ config BOOTBLOCK_CPU_INIT
 	  bootblock must load microcode or copy data from ROM before
 	  searching for the bootblock.
 
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0x0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex "offset of master CBFS header in ROM"
-	default 0x18000
-
-config CBFS_ROM_OFFSET
-	hex "offset of CBFS data in ROM"
-	default 0x18080
-
 config TEGRA124_MODEL_TD570D
 	bool "TD570D"
 
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 0870c7e68c..4c927a8cb8 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -42,22 +42,10 @@ config BOOTBLOCK_CPU_INIT
 	  bootblock must load microcode or copy data from ROM before
 	  searching for the bootblock.
 
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0x0
-
 config MAX_CPUS
 	int
 	default 2
 
-config CBFS_HEADER_ROM_OFFSET
-	hex "offset of master CBFS header in ROM"
-	default 0x40000
-
-config CBFS_ROM_OFFSET
-	hex "offset of CBFS data in ROM"
-	default 0x40080
-
 config MTS_DIRECTORY
 	string "Directory where MTS microcode files are located"
 	default "3rdparty/cpu/nvidia/tegra132/current/prod"
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 0136a18ef6..bc658a059c 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -21,18 +21,6 @@ config CBFS_SIZE
 	  coreboot blob elsewhere in the system. Make sure this config option
 	  is fine tuned in the board config file.
 
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0x0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex "offset of master CBFS header in ROM"
-	default 0x1b4000
-
-config CBFS_ROM_OFFSET
-	hex "offset of CBFS data in ROM"
-	default 0x1b4080
-
 config MBN_ENCAPSULATION
 	depends on USE_BLOBS
 	bool "bootblock encapsulation for ipq8064"
diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig
index ada3d58138..95113f38cb 100644
--- a/src/soc/rockchip/rk3288/Kconfig
+++ b/src/soc/rockchip/rk3288/Kconfig
@@ -37,22 +37,4 @@ config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/rockchip/rk3288/bootblock.c"
 
-# ROM image layout.
-#
-# 0x00000 Combined bootblock and ID Block
-# 0x08000 Master CBFS header.
-# 0x18000 Free for CBFS data.
-
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0x0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex
-	default 0x0010000
-
-config CBFS_ROM_OFFSET
-	hex
-	default 0x0010100
-
 endif
diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig
index 7034e96201..ea63e9cda8 100644
--- a/src/soc/samsung/exynos5250/Kconfig
+++ b/src/soc/samsung/exynos5250/Kconfig
@@ -9,28 +9,3 @@ config CPU_SAMSUNG_EXYNOS5250
 	select HAVE_UART_SPECIAL
 	bool
 	default n
-
-if CPU_SAMSUNG_EXYNOS5250
-
-# ROM image layout.
-#
-# 0x0000: vendor-provided BL1 (8k).
-# 0x2000: bootblock
-# 0x9FFC-0xA000: BL2 checksum
-# 0xA000-0xA080: reserved for CBFS master header.
-# 0xA080: Free for CBFS data.
-
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex "offset of master CBFS header in ROM"
-	default 0x9F80
-
-config CBFS_ROM_OFFSET
-	# Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size.
-	hex "offset of CBFS data in ROM"
-	default 0x0A080
-
-endif
diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig
index 072976a2ac..56ffed1940 100644
--- a/src/soc/samsung/exynos5420/Kconfig
+++ b/src/soc/samsung/exynos5420/Kconfig
@@ -10,28 +10,3 @@ config CPU_SAMSUNG_EXYNOS5420
 	select RELOCATABLE_MODULES
 	bool
 	default n
-
-if CPU_SAMSUNG_EXYNOS5420
-
-# ROM image layout.
-#
-# 0x0000: vendor-provided BL1 (8k).
-# 0x2000: variable length bootblock checksum header
-# 0x2010: bootblock
-#  0x9F80-0xA000: reserved for CBFS master header.
-# 0xA000: Free for CBFS data.
-
-config BOOTBLOCK_ROM_OFFSET
-	hex
-	default 0
-
-config CBFS_HEADER_ROM_OFFSET
-	hex "offset of master CBFS header in ROM"
-	default 0x9F80
-
-config CBFS_ROM_OFFSET
-	# Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size.
-	hex "offset of CBFS data in ROM"
-	default 0x0A000
-
-endif