diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-01-08 11:37:18 +0100 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2019-01-15 07:45:41 +0000 |
| commit | e77d6dc85249e5556877d36511e2f361592b3148 (patch) | |
| tree | 605e3745a8615c56a92e37c738c83c0c8ebb7266 /src/soc | |
| parent | 3ef017c4d4975aa055f8be3dc8a5cf37250f88e2 (diff) | |
vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp
Default to FSP binary and headers shiped in 3rdparty/fsp.
* Drop headers and code from vendorcode/intel/fsp1_0/broadwell_de
* Select HAVE_FSP_BIN to build test the platform
* Fetch FSP repo as submodule
* Make FSP_HEADER_PATH known from FSP2.0 useable on FSP1.0
* Introduce FSP_SRC_PATH for FSP source file
* Add sane defaults for FSP_FILE
Tested on wedge100s.
Change-Id: I46f201218d19cf34c43a04f57458f474d8c3340d
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/30742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/fsp/Kconfig | 10 |
2 files changed, 10 insertions, 7 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index 197e365f74..35cf2ad363 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -20,13 +20,12 @@ config CPU_SPECIFIC_OPTIONS select IOAPIC select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS - # Microcode header files are delivered in FSP package - select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN select INTEL_DESCRIPTOR_MODE_CAPABLE select SMM_TSEG select HAVE_SMI_HANDLER select TSC_MONOTONIC_TIMER select TSC_CONSTANT_RATE + select HAVE_FSP_BIN config VBOOT select VBOOT_STARTS_IN_ROMSTAGE @@ -80,10 +79,6 @@ config CONSOLE_CBMEM bool "Send console output to a CBMEM buffer" default n -config CPU_MICROCODE_HEADER_FILES - string - default "../intel/cpu/broadwell_de/microcode/M1050663_07000001.h ../intel/cpu/broadwell_de/microcode/M1050662_0000000A.h ../intel/cpu/broadwell_de/microcode/MFF50661_F1000008.h" - config SERIRQ_CONTINUOUS_MODE bool default n diff --git a/src/soc/intel/fsp_broadwell_de/fsp/Kconfig b/src/soc/intel/fsp_broadwell_de/fsp/Kconfig index 32fe0b8be3..b4f48868d4 100644 --- a/src/soc/intel/fsp_broadwell_de/fsp/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/fsp/Kconfig @@ -6,10 +6,18 @@ config BROADWELL_DE_FSP_SPECIFIC_OPTIONS config FSP_FILE string - default "../intel/fsp/broadwell_de/BROADWELLDE_FSP.bin" + default "3rdparty/fsp/BroadwellDEFspBinPkg/FspBin/BROADWELLDE_FSP.bin" help The path and filename of the Intel FSP binary for this platform. +config FSP_HEADER_PATH + string + default "$(top)/3rdparty/fsp/BroadwellDEFspBinPkg/include/" + +config FSP_SRC_PATH + string + default "$(top)/3rdparty/fsp/BroadwellDEFspBinPkg/include/fspsupport.c" + config FSP_LOC hex default 0xffeb0000 |