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authorKarthikeyan Ramasubramanian <kramasub@google.com>2023-04-10 17:46:41 -0600
committerKarthik Ramasubramanian <kramasub@google.com>2023-04-19 19:09:47 +0000
commite4fd7dc9ff7ff6cd5dac32f27bd069d9d350f275 (patch)
tree934f2edeb16d336cc3101d5d4451a9a3e038cc05 /src/soc
parentea68fa0b2387be67ab1c77f4e12b31c231b93eff (diff)
soc/amd/common/block/lpc/spi_dma: Leverage CBFS_CACHE when using SPI DMA
CBFS library performs memory mapped access of the files during loading, verification and de-compression. Even with MTRRs configured correctly, first few file access through memory map are taking longer times to load. Update the SPI DMA driver to load the files into CBFS cache, so that they can be verified and de-compressed with less overhead. This saves ~60 ms in boot time. BUG=None TEST=Build Skyrim BIOS image and boot to OS. Observe ~60 ms improvement with the boot time. Performing additional test to confirm there are no regressions. Before: ======= 970:loading FSP-M 15:starting LZMA decompress (ignore for x86) 760,906 (60,035) 16:finished LZMA decompress (ignore for x86) 798,787 (37,881) 8:starting to load ramstage 17:starting LZ4 decompress (ignore for x86) 1,050,093 (13,790) 18:finished LZ4 decompress (ignore for x86) 1,054,086 (3,993) 971:loading FSP-S 17:starting LZ4 decompress (ignore for x86) 1,067,778 (3,313) 18:finished LZ4 decompress (ignore for x86) 1,068,022 (244) 90:starting to load payload 17:starting LZ4 decompress (ignore for x86) 1,302,155 (11,285) 18:finished LZ4 decompress (ignore for x86) 1,303,938 (1,783) After: ====== 970:loading FSP-M 15:starting LZMA decompress (ignore for x86) 709,542 (12,178) 16:finished LZMA decompress (ignore for x86) 739,379 (29,837) 8:starting to load ramstage 17:starting LZ4 decompress (ignore for x86) 1,001,316 (12,368) 18:finished LZ4 decompress (ignore for x86) 1,001,971 (655) 971:loading FSP-S 17:starting LZ4 decompress (ignore for x86) 1,016,514 (3,031) 18:finished LZ4 decompress (ignore for x86) 1,016,722 (207) 90:starting to load payload 17:starting LZ4 decompress (ignore for x86) 1,244,602 (10,313) 18:finished LZ4 decompress (ignore for x86) 1,244,831 (228) Change-Id: Ie30b6324f9977261c60e55ed509e979ef290f1f1 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Tim Van Patten <timvp@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/lpc/spi_dma.c52
-rw-r--r--src/soc/amd/mendocino/Kconfig2
2 files changed, 37 insertions, 17 deletions
diff --git a/src/soc/amd/common/block/lpc/spi_dma.c b/src/soc/amd/common/block/lpc/spi_dma.c
index 8fbd9bd710..701b61abb2 100644
--- a/src/soc/amd/common/block/lpc/spi_dma.c
+++ b/src/soc/amd/common/block/lpc/spi_dma.c
@@ -4,6 +4,7 @@
#include <amdblocks/spi.h>
#include <assert.h>
#include <boot_device.h>
+#include <cbfs.h>
#include <commonlib/bsd/helpers.h>
#include <commonlib/region.h>
#include <console/console.h>
@@ -26,22 +27,6 @@ struct spi_dma_transaction {
size_t remaining;
};
-static void *spi_dma_mmap(const struct region_device *rd, size_t offset,
- size_t size __always_unused)
-{
- const struct mem_region_device *mdev;
-
- mdev = container_of(rd, __typeof__(*mdev), rdev);
-
- return &mdev->base[offset];
-}
-
-static int spi_dma_munmap(const struct region_device *rd __always_unused,
- void *mapping __always_unused)
-{
- return 0;
-}
-
static ssize_t spi_dma_readat_mmap(const struct region_device *rd, void *b, size_t offset,
size_t size)
{
@@ -223,6 +208,41 @@ static ssize_t spi_dma_readat(const struct region_device *rd, void *b, size_t of
return spi_dma_readat_mmap(rd, b, offset, size);
}
+static void *spi_dma_mmap(const struct region_device *rd, size_t offset, size_t size)
+{
+ const struct mem_region_device *mdev;
+ void *mapping;
+
+ mdev = container_of(rd, __typeof__(*mdev), rdev);
+
+ if (!CONFIG_CBFS_CACHE_SIZE)
+ return &mdev->base[offset];
+
+ mapping = mem_pool_alloc(&cbfs_cache, size);
+ if (!mapping) {
+ printk(BIOS_INFO, "%s: Could not allocate %zu bytes from memory pool\n",
+ __func__, size);
+ /* Fall-back to memory map */
+ return &mdev->base[offset];
+ }
+
+ if (spi_dma_readat(rd, mapping, offset, size) != size) {
+ printk(BIOS_ERR, "%s: Error reading into mmap buffer\n", __func__);
+ mem_pool_free(&cbfs_cache, mapping);
+ /* Fall-back to memory mapped read - not expected to fail atleast for now */
+ spi_dma_readat_mmap(rd, mapping, offset, size);
+ }
+
+ return mapping;
+}
+
+static int spi_dma_munmap(const struct region_device *rd __always_unused, void *mapping)
+{
+ if (CONFIG_CBFS_CACHE_SIZE)
+ mem_pool_free(&cbfs_cache, mapping);
+ return 0;
+}
+
const struct region_device_ops spi_dma_rdev_ro_ops = {
.mmap = spi_dma_mmap,
.munmap = spi_dma_munmap,
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig
index 1abe018768..91fd57d326 100644
--- a/src/soc/amd/mendocino/Kconfig
+++ b/src/soc/amd/mendocino/Kconfig
@@ -243,7 +243,7 @@ config ASYNC_FILE_LOADING
config CBFS_CACHE_SIZE
hex
- default 0x40000 if CBFS_PRELOAD
+ default 0x40000 if CBFS_PRELOAD || SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
config RO_REGION_ONLY
string