diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2021-09-30 09:51:42 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-01 18:43:52 +0000 |
| commit | e415df9b7fbf6f6c6c1866c123ec7db43879af8d (patch) | |
| tree | 1140f86bbb51a716005a4e76d48f35d8bd2ae26d /src/soc | |
| parent | 125206322d8a508261bb9ef145dc7172a87c0dd8 (diff) | |
mb/intel/adlrvp: set PL4 value dynamically for thermal
Set PL4 value dynamically for adlrvp board based on CPU SKUs
which is detectable at runtime. These values are based on
platform design specification.
BUG=None
BRANCH=None
TEST=Build FW and test on adlrvp board
On 682:
Overriding power limits PL1 (4000, 28000) PL2 (64000, 64000) PL4 (140000)
Change-Id: I9c0c418e2548cc7f9aa647a5ad98123b33e9f9b8
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions