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authorMario Scheithauer <mario.scheithauer@siemens.com>2023-05-22 15:27:36 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-06-01 15:42:30 +0000
commitc8dc2c12040f911d8e6f72f134e46dd9a9d8beb0 (patch)
tree362c54b3079b071ec2111d9b5123cc21b152946f /src/soc
parent6256fb63fff9db1e7f77f58da5c9514eb783c199 (diff)
soc/intel/apollolake: Make hard drive type for SATA ports configurable
Intel's APL FSP offers the possibility to select the connected hard drive type to SATA ports. One has the option to choose between HDD ('0' - default) and SSD ('1'). This patch provides a chip config so that this FSP parameter can be set as needed in the devicetree on mainboard level. Change-Id: I52c3566fb3c959ada6be33f0546ac331f4867d10 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75366 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jan Samek <jan.samek@siemens.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/chip.c2
-rw-r--r--src/soc/intel/apollolake/chip.h3
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index bd40595ea3..71470111ae 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -739,6 +739,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
silconfig->SpeedLimit = cfg->sata_speed;
memcpy(silconfig->SataPortsEnable, cfg->SataPortsEnable,
sizeof(silconfig->SataPortsEnable));
+ memcpy(silconfig->SataPortsSolidStateDrive, cfg->sata_ports_ssd,
+ sizeof(silconfig->SataPortsSolidStateDrive));
}
/* Sata Power Optimisation */
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 3951880610..45b60d3c89 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -109,6 +109,9 @@ struct soc_intel_apollolake_config {
/* Sata Ports Enable */
uint8_t SataPortsEnable[2];
+ /* Sata Ports Solid State Drive */
+ uint8_t sata_ports_ssd[2];
+
/* Specifies on which IRQ the SCI will internally appear. */
uint8_t sci_irq;