diff options
author | Subrata Banik <subratabanik@google.com> | 2024-07-17 11:43:26 +0000 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-07-19 03:55:59 +0000 |
commit | c54d186717b584117c1beffda3e0beb89652eebf (patch) | |
tree | 7148752a901521fb2c84805df279d20c4ae326f4 /src/soc | |
parent | f79e0893cdd1fab0e53bc34f414445777559a0ad (diff) |
device/pci_ids: Add new Intel PTL device IDs for CSE0
This patch adds new CSE0 PCI device IDs for Intel PTL-U
and PTL-H.
Additionally, updates the CSE0 driver's `pci_device_ids` list to
include these new IDs.
Finally, dropped unused CSE1-3 PCI IDs.
Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2
BUG=b:347669091
TEST=Able to build google/fatcat.
Change-Id: I5656aeb8c5439c8361aeb3a3d759df1216d84f8b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83517
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index ed07f69283..6389044428 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1479,7 +1479,8 @@ struct device_operations cse_ops = { }; static const unsigned short pci_device_ids[] = { - PCI_DID_INTEL_PTL_CSE0, + PCI_DID_INTEL_PTL_H_CSE0, + PCI_DID_INTEL_PTL_U_H_CSE0, PCI_DID_INTEL_LNL_CSE0, PCI_DID_INTEL_MTL_CSE0, PCI_DID_INTEL_APL_CSE0, |