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authorRizwan Qureshi <rizwan.qureshi@intel.com>2017-01-13 22:04:11 +0530
committerMartin Roth <martinroth@google.com>2017-02-23 17:05:58 +0100
commitc2c8a743d1941998e6c316adec98947509ab387e (patch)
tree69d573e3c114f30ce364dba0e76d00a8899fb90d /src/soc
parent30d4604e5a33e735e59765ff94a61d78ca419654 (diff)
soc/intel/skylake: Enable Systemagent IMGU
Camera and Imaging device should be enabled for camera usecase, FSP provides a UPD to enable/disable the SA IMGU (Imaging Unit) expose the same as a config option in devicetree.cb Also remove a redundant assignment for PchCio2Enable. BUG=None BRANCH=None TEST=lspci should list 00:05:00 Change-Id: I4cf7daf41bfaf4dcba414921cac2e7e12bf89f37 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/18365 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/skylake/chip.h1
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c2
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 07cb8b1669..2e4adb2a6e 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -205,6 +205,7 @@ struct soc_intel_skylake_config {
/* Camera */
u8 Cio2Enable;
+ u8 SaImguEnable;
/* eMMC and SD */
u8 ScsEmmcEnabled;
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 2b50d0c85b..8b8c37c031 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -174,6 +174,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
sizeof(params->SerialIoDevMode));
params->PchCio2Enable = config->Cio2Enable;
+ params->SaImguEnable = config->SaImguEnable;
params->Heci3Enabled = config->Heci3Enabled;
params->LogoPtr = config->LogoPtr;
@@ -186,7 +187,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx;
params->PchLanEnable = config->EnableLan;
- params->PchCio2Enable = config->Cio2Enable;
params->SataSalpSupport = config->SataSalpSupport;
params->SsicPortEnable = config->SsicPortEnable;
params->ScsEmmcEnabled = config->ScsEmmcEnabled;