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authorAngel Pons <th3fanbus@gmail.com>2021-03-18 20:35:19 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-22 13:01:19 +0000
commitc1301dd2d23532d4d824499a6632fa2d08fb23e5 (patch)
treee961776e1793d91b9cbf5f5a527cfc057db76020 /src/soc
parent1895d1a181a0e50f05f03c247d9827e976b9b333 (diff)
{lynxpoint/broadwell}: Set Azalia HDCFG.BCLD bit
Lock down several HD Audio registers by setting the HDCFG.BCLD bit. Tested on Asrock B85M Pro4, the GCAP register becomes read-only. Change-Id: Id6208289a68baaedc4aad51cc0c5355f996a1b00 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/broadwell/pch/hda.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/pch/hda.c b/src/soc/intel/broadwell/pch/hda.c
index c6ae590bc4..ba7d342fe5 100644
--- a/src/soc/intel/broadwell/pch/hda.c
+++ b/src/soc/intel/broadwell/pch/hda.c
@@ -129,12 +129,19 @@ static void hda_enable(struct device *dev)
}
}
+static void hda_final(struct device *dev)
+{
+ /* Set HDCFG.BCLD */
+ pci_or_config16(dev, 0x40, 1 << 1);
+}
+
static struct device_operations hda_ops = {
.read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.init = &hda_init,
.enable = &hda_enable,
+ .final = &hda_final,
.ops_pci = &pci_dev_ops_pci,
};