soc/amd/common/block/cpu/mca: commonize mca_check_all_banks

Since we don't need to skip the MCA check on cold boot on MCAX capable
systems, add a mca_skip_check implementation that always returns false.

Change-Id: Id8fc4b6f02b6c02b03172fe11f0451a9893e514d
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

4 files changed, 43 insertions, 55 deletions

diff --git a/src/soc/amd/common/block/cpu/mca/mca.c b/src/soc/amd/common/block/cpu/mca/mca.c
index 1c3a30cf56..48c0286dad 100644
--- a/src/soc/amd/common/block/cpu/mca/mca.c
+++ b/src/soc/amd/common/block/cpu/mca/mca.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <amdblocks/mca.h>
 #include <amdblocks/reset.h>
 #include <cpu/amd/msr.h>
 #include <cpu/x86/lapic.h>
@@ -9,12 +8,12 @@
 #include <types.h>
 #include "mca_common_defs.h"
 
-static bool mca_skip_check(void)
+bool mca_skip_check(void)
 {
 	return !is_warm_reset();
 }
 
-static void mca_print_error(unsigned int bank)
+void mca_print_error(unsigned int bank)
 {
 	msr_t msr;
 
@@ -32,29 +31,3 @@ static void mca_print_error(unsigned int bank)
 	msr = rdmsr(MC_CTL_MASK(bank));
 	printk(BIOS_WARNING, "   MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
 }
-
-void mca_check_all_banks(void)
-{
-	struct mca_bank_status mci;
-	const unsigned int num_banks = mca_get_bank_count();
-
-	if (!mca_has_expected_bank_count())
-		printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
-
-	if (mca_skip_check())
-		return;
-
-	for (unsigned int i = 0 ; i < num_banks ; i++) {
-		if (!mca_is_valid_bank(i))
-			continue;
-
-		mci.bank = i;
-		mci.sts = rdmsr(IA32_MC_STATUS(i));
-		if (mci.sts.hi || mci.sts.lo) {
-			mca_print_error(i);
-
-			if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
-				build_bert_mca_error(&mci);
-		}
-	}
-}
diff --git a/src/soc/amd/common/block/cpu/mca/mca_common.c b/src/soc/amd/common/block/cpu/mca/mca_common.c
index f029966dc7..b35769136a 100644
--- a/src/soc/amd/common/block/cpu/mca/mca_common.c
+++ b/src/soc/amd/common/block/cpu/mca/mca_common.c
@@ -2,8 +2,38 @@
 
 #include <amdblocks/mca.h>
 #include <cpu/x86/msr.h>
+#include <console/console.h>
+#include <types.h>
 #include "mca_common_defs.h"
 
+static void mca_check_all_banks(void)
+{
+	struct mca_bank_status mci;
+	const unsigned int num_banks = mca_get_bank_count();
+
+	if (!mca_has_expected_bank_count())
+		printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
+
+	if (mca_skip_check())
+		return;
+
+	for (unsigned int i = 0 ; i < num_banks ; i++) {
+		if (!mca_is_valid_bank(i))
+			continue;
+
+		mci.bank = i;
+		/* The MCA status register can be used in both the MCA and MCAX case */
+		mci.sts = rdmsr(IA32_MC_STATUS(i));
+		if (mci.sts.hi || mci.sts.lo) {
+			mca_print_error(i);
+
+			if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
+				build_bert_mca_error(&mci);
+		}
+	}
+}
+
+
 void check_mca(void)
 {
 	mca_check_all_banks();
diff --git a/src/soc/amd/common/block/cpu/mca/mca_common_defs.h b/src/soc/amd/common/block/cpu/mca/mca_common_defs.h
index 8142371664..910965a3a0 100644
--- a/src/soc/amd/common/block/cpu/mca/mca_common_defs.h
+++ b/src/soc/amd/common/block/cpu/mca/mca_common_defs.h
@@ -5,8 +5,10 @@
 
 #include <amdblocks/mca.h>
 #include <cper.h>
+#include <types.h>
 
-void mca_check_all_banks(void);
+bool mca_skip_check(void);
+void mca_print_error(unsigned int bank);
 void build_bert_mca_error(struct mca_bank_status *mci);
 enum cper_x86_check_type error_to_chktype(struct mca_bank_status *mci);
 void fill_generic_section(cper_proc_generic_error_section_t *sec, struct mca_bank_status *mci);
diff --git a/src/soc/amd/common/block/cpu/mca/mcax.c b/src/soc/amd/common/block/cpu/mca/mcax.c
index fecac0a11f..b8fa0c0fed 100644
--- a/src/soc/amd/common/block/cpu/mca/mcax.c
+++ b/src/soc/amd/common/block/cpu/mca/mcax.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <amdblocks/mca.h>
 #include <amdblocks/msr_zen.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/msr.h>
@@ -8,7 +7,14 @@
 #include <types.h>
 #include "mca_common_defs.h"
 
-static void mca_print_error(unsigned int bank)
+bool mca_skip_check(void)
+{
+	/* On Zen-based CPUs/APUs the MCA(X) status register have a defined state even in the
+	   cold boot path, so no need to skip the check */
+	return false;
+}
+
+void mca_print_error(unsigned int bank)
 {
 	msr_t msr;
 
@@ -26,26 +32,3 @@ static void mca_print_error(unsigned int bank)
 	msr = rdmsr(MCA_CTL_MASK_MSR(bank));
 	printk(BIOS_WARNING, "   MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
 }
-
-void mca_check_all_banks(void)
-{
-	struct mca_bank_status mci;
-	const unsigned int num_banks = mca_get_bank_count();
-
-	if (!mca_has_expected_bank_count())
-		printk(BIOS_WARNING, "CPU has an unexpected number of MCA banks!\n");
-
-	for (unsigned int i = 0 ; i < num_banks ; i++) {
-		if (!mca_is_valid_bank(i))
-			continue;
-
-		mci.bank = i;
-		mci.sts = rdmsr(MCAX_STATUS_MSR(i));
-		if (mci.sts.hi || mci.sts.lo) {
-			mca_print_error(i);
-
-			if (CONFIG(ACPI_BERT) && mca_valid(mci.sts))
-				build_bert_mca_error(&mci);
-		}
-	}
-}