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authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-09-10 11:36:21 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-09-27 13:29:37 +0000
commitb3ffff87dd1e01eb20240279f5d88707475c1428 (patch)
tree83a335c4b97a8b3d44c75ef9f510aed9a729a958 /src/soc
parent401238873615141627cd06d61b57d63198619af2 (diff)
soc/amd/cezanne, vc/amd/fsp/*: Add support for CCP DMA SVC call
Add support to access the boot device from PSP through Crypto Co-Processor (CCP) DMA. Implement a SVC call to use CCP DMA on SoCs where it is supported and a stub on SoCs where it is not supported. This provides an improved performance while accessing the boot device and reduces the boot time by ~45 ms. BUG=b:194990811 TEST=Build and boot to OS in guybrush. Perform cold and warm reboot cycling for 250 iterations. Change-Id: I02b94a842190ac4dcf45ff2d846b8665f06a9c75 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/psp_verstage/svc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/psp_verstage/svc.c b/src/soc/amd/cezanne/psp_verstage/svc.c
index e0f1b52d60..e04c702518 100644
--- a/src/soc/amd/cezanne/psp_verstage/svc.c
+++ b/src/soc/amd/cezanne/psp_verstage/svc.c
@@ -126,3 +126,10 @@ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
SVC_CALL1(SVC_MODEXP, mod_exp_param, retval);
return retval;
}
+
+uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size)
+{
+ uint32_t retval = 0;
+ SVC_CALL3(SVC_CCP_DMA, spi_rom_offset, dest, size, retval);
+ return retval;
+}