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authorSubrata Banik <subratabanik@google.com>2024-07-17 10:45:22 +0000
committerSubrata Banik <subratabanik@google.com>2024-07-19 03:55:39 +0000
commitaf8caf9e67efd3bc9780eb7bee56f6ed7e6be1e1 (patch)
treee19f566de118031c4c2514dcb787a7ac0b3adc98 /src/soc
parentf234cf4b21d813f143bc26533e92d2b9cd2c9dd6 (diff)
device/pci_ids: Add new Intel PTL device IDs for P2SBx
This patch adds new P2SBx PCI device IDs for Intel PTL-U and PTL-H. Additionally, updates the P2SBx driver's `pci_device_ids` list to include these new IDs. Source: Intel PTL-EDS vol 1. Document Number 815002, Rev 0.51 Chapter 2 BUG=b:347669091 TEST=Able to build google/fatcat. Change-Id: Ie1c36bc1c014bb1e219afe0cafb6c9941f253b0c Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/common/block/p2sb/ioe_p2sb.c2
-rw-r--r--src/soc/intel/common/block/p2sb/p2sb.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/p2sb/ioe_p2sb.c b/src/soc/intel/common/block/p2sb/ioe_p2sb.c
index 769b853af2..3f45e69af9 100644
--- a/src/soc/intel/common/block/p2sb/ioe_p2sb.c
+++ b/src/soc/intel/common/block/p2sb/ioe_p2sb.c
@@ -37,6 +37,8 @@ struct device_operations device_ops = {
};
static const unsigned short pci_device_ids[] = {
+ PCI_DID_INTEL_PTL_H_P2SB2,
+ PCI_DID_INTEL_PTL_U_H_P2SB2,
PCI_DID_INTEL_MTL_IOE_M_P2SB,
PCI_DID_INTEL_MTL_IOE_P_P2SB,
0,
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index e348501cde..16f78da6c7 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -137,6 +137,8 @@ const struct device_operations p2sb_ops = {
};
static const unsigned short pci_device_ids[] = {
+ PCI_DID_INTEL_PTL_H_P2SB,
+ PCI_DID_INTEL_PTL_U_H_P2SB,
PCI_DID_INTEL_LNL_P2SB,
PCI_DID_INTEL_MTL_SOC_P2SB,
PCI_DID_INTEL_RPP_P_P2SB,