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authorFelix Held <felix-coreboot@felixheld.de>2021-07-22 17:34:28 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-07-23 18:03:04 +0000
commita754aa6d29f2078cffac6559a9efca6f9ce862ac (patch)
tree48edff2ed17be4ee3d5f2237108d51bbab2bceed /src/soc
parent12184db008736c7d0c9fc7f03a872bef6cd7feab (diff)
soc/amd/picasso/fch: make sb_clk_output_48Mhz static
sb_clk_output_48Mhz is only used in fch.c where it is also implemented, so no need to have it visible outside of that compilation unit. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2b0d10ff26bdf54ea791aa66bf400578466d54cf Reviewed-on: https://review.coreboot.org/c/coreboot/+/56525 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/picasso/fch.c2
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h1
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index dcae1adff6..58a5ce9165 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -86,7 +86,7 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
-void sb_clk_output_48Mhz(void)
+static void sb_clk_output_48Mhz(void)
{
u32 ctrl;
const struct soc_amd_picasso_config *cfg = config_of_soc();
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 1a0456dade..2cc1c62bb3 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -151,7 +151,6 @@ void fch_final(void *chip_info);
void enable_aoac_devices(void);
void wait_for_aoac_enabled(unsigned int dev);
-void sb_clk_output_48Mhz(void);
/* Allow the board to change the default I2C pad configuration */
void mainboard_i2c_override(int bus, uint32_t *pad_settings);