diff options
| author | chun-jie.chen <chun-jie.chen@mediatek.corp-partner.google.com> | 2021-05-18 23:06:15 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-26 07:32:44 +0000 |
| commit | a36a68b02719cb661d35038fa78600d0b890607c (patch) | |
| tree | 968a665b9995423e9e91428dd6f6477429b76c52 /src/soc | |
| parent | fb5fa1abe7a17caf29c387cb6864b85b1479822b (diff) | |
soc/mediatek/mt8195: Change fsrc source to ulposc
Set fsrc source to ulposc_d10 for 26m off low power scenario.
Signed-off-by: chun-jie.chen <chun-jie.chen@mediatek.com>
Change-Id: Ifb02d32820944d7cfbbf23de638e9a0e82b5e84d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54870
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/mediatek/mt8195/pll.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/pll.c b/src/soc/mediatek/mt8195/pll.c index 9e9718eb7a..30a8f31beb 100644 --- a/src/soc/mediatek/mt8195/pll.c +++ b/src/soc/mediatek/mt8195/pll.c @@ -469,7 +469,7 @@ static const struct mux_sel mux_sels[] = { { .id = TOP_SPINOR_SEL, .sel = 3 }, /* 3: univpll_d6_d8 */ /* CLK_CFG_29 */ { .id = TOP_DVIO_DGI_REF_SEL, .sel = 1 }, /* 1: in_dgi_ck */ - { .id = TOP_SRCK_SEL, .sel = 1 }, /* 1: xtal_26m_ck */ + { .id = TOP_SRCK_SEL, .sel = 0 }, /* 0: ulposc_d10 */ /* CLK_MISC_CFG_3 */ { .id = TOP_MFG_FAST_SEL, .sel = 1 }, /* 1: AD_MFGPLL_OPP_CK */ }; |