diff options
| author | Grzegorz Bernacki <bernacki@google.com> | 2023-05-29 11:53:38 +0000 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-07-14 15:13:33 +0000 |
| commit | a0bd3e9a972908c428677b2c1541d16ddf9e77a0 (patch) | |
| tree | 107327f049fc4c59150c041a4ae21cb959d2730b /src/soc | |
| parent | 64335176d1445e89a9662a32222116ab19923daa (diff) | |
mb/google: AMD: move tpm_tis to AMD common code
It moves cr50_plat_irq_status() to common code and adds Kconfig
option to specify GPIO used for interrupt.
BUG=b:277787305
TEST=Build all affected platform and confirm using right GPIO
number. Tested on Skyrim.
Change-Id: I775c4e24cffee99b6ac3e05b58a75425029a86c8
Signed-off-by: Grzegorz Bernacki <bernacki@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75621
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/gpio/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/gpio/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/soc/amd/common/block/gpio/tpm_tis.c | 18 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/gpio.h | 3 |
4 files changed, 31 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/gpio/Kconfig b/src/soc/amd/common/block/gpio/Kconfig index 0a1bffee81..707c6d0775 100644 --- a/src/soc/amd/common/block/gpio/Kconfig +++ b/src/soc/amd/common/block/gpio/Kconfig @@ -18,3 +18,9 @@ config SOC_AMD_COMMON_BLOCK_BANKED_GPIOS_NON_SOC_CODEBASE code. endif # SOC_AMD_COMMON_BLOCK_BANKED_GPIOS + +config GSC_IRQ_GPIO + int + help + gpio_interrupt_status() is used to provide interrupt status to TPM layer. + This option specifies the GPIO number. diff --git a/src/soc/amd/common/block/gpio/Makefile.inc b/src/soc/amd/common/block/gpio/Makefile.inc index 64fbe27c7c..3de522e26c 100644 --- a/src/soc/amd/common/block/gpio/Makefile.inc +++ b/src/soc/amd/common/block/gpio/Makefile.inc @@ -4,4 +4,8 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS),y) all-y += gpio.c smm-y += gpio.c +romstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c +ramstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c +verstage-$(CONFIG_TPM_GOOGLE) += tpm_tis.c + endif # CONFIG_SOC_AMD_COMMON_BLOCK_BANKED_GPIOS diff --git a/src/soc/amd/common/block/gpio/tpm_tis.c b/src/soc/amd/common/block/gpio/tpm_tis.c new file mode 100644 index 0000000000..785bd58199 --- /dev/null +++ b/src/soc/amd/common/block/gpio/tpm_tis.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <drivers/tpm/cr50.h> +#include <gpio.h> + +__weak gpio_t cr50_override_gpio(gpio_t irq) +{ + return irq; +} + +int cr50_plat_irq_status(void) +{ + gpio_t irq_gpio = CONFIG_GSC_IRQ_GPIO; + + irq_gpio = cr50_override_gpio(irq_gpio); + + return gpio_interrupt_status(irq_gpio); +} diff --git a/src/soc/amd/common/block/include/amdblocks/gpio.h b/src/soc/amd/common/block/include/amdblocks/gpio.h index 020a09dc2c..6c4857d723 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio.h @@ -92,4 +92,7 @@ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items) void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); void gpio_restore_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save); +/* Overrides Kconfig GPIO number */ +gpio_t cr50_override_gpio(gpio_t irq); + #endif /* AMD_BLOCK_GPIO_BANKS_H */ |