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authorElyes HAOUAS <ehaouas@noos.fr>2020-07-11 19:20:10 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-26 20:59:44 +0000
commit8dcccea8e4c00322ff4099797b37b310778de493 (patch)
tree704b172fd32aa64f4b93de6f788af2b28ce70cdc /src/soc
parent36b569af55484e99ecb55a55b5a480b07137afd9 (diff)
src: Remove unused 'include <cbmem.h>'
Change-Id: Ib41341b42904dc3050a97b70966dde7e46057d6b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/picasso/mca.c1
-rw-r--r--src/soc/amd/picasso/romstage.c1
-rw-r--r--src/soc/intel/apollolake/romstage.c1
-rw-r--r--src/soc/intel/cannonlake/elog.c1
-rw-r--r--src/soc/intel/denverton_ns/romstage.c1
-rw-r--r--src/soc/intel/icelake/elog.c1
-rw-r--r--src/soc/intel/jasperlake/elog.c1
-rw-r--r--src/soc/intel/tigerlake/elog.c1
-rw-r--r--src/soc/intel/xeon_sp/skx/romstage.c1
9 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c
index 69363f5625..e16d0a19e3 100644
--- a/src/soc/amd/picasso/mca.c
+++ b/src/soc/amd/picasso/mca.c
@@ -7,7 +7,6 @@
#include <console/console.h>
#include <arch/bert_storage.h>
#include <cper.h>
-#include <cbmem.h>
struct mca_bank {
int bank;
diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c
index 0a337e7720..372c6b5b18 100644
--- a/src/soc/amd/picasso/romstage.c
+++ b/src/soc/amd/picasso/romstage.c
@@ -5,7 +5,6 @@
#include <cpu/x86/cache.h>
#include <cpu/amd/mtrr.h>
#include <console/uart.h>
-#include <cbmem.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <program_loading.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index d14dd8d3ee..c5b060f70e 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -4,7 +4,6 @@
#include <device/pci_ops.h>
#include <arch/symbols.h>
#include <assert.h>
-#include <cbmem.h>
#include <cf9_reset.h>
#include <console/console.h>
#include <cpu/x86/pae.h>
diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c
index fb254729da..9fa725e388 100644
--- a/src/soc/intel/cannonlake/elog.c
+++ b/src/soc/intel/cannonlake/elog.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <device/pci_ops.h>
#include <stdint.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 713fb1e3ac..add558bb98 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -2,7 +2,6 @@
#include <arch/romstage.h>
#include <arch/io.h>
-#include <cbmem.h>
#include <cf9_reset.h>
#include <console/console.h>
#include <device/pci_ops.h>
diff --git a/src/soc/intel/icelake/elog.c b/src/soc/intel/icelake/elog.c
index 586dbfdd24..4727fbf9f6 100644
--- a/src/soc/intel/icelake/elog.c
+++ b/src/soc/intel/icelake/elog.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <stdint.h>
#include <elog.h>
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c
index 586dbfdd24..4727fbf9f6 100644
--- a/src/soc/intel/jasperlake/elog.c
+++ b/src/soc/intel/jasperlake/elog.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <stdint.h>
#include <elog.h>
diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c
index d5b875419a..b38d316def 100644
--- a/src/soc/intel/tigerlake/elog.c
+++ b/src/soc/intel/tigerlake/elog.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h>
-#include <cbmem.h>
#include <console/console.h>
#include <stdint.h>
#include <elog.h>
diff --git a/src/soc/intel/xeon_sp/skx/romstage.c b/src/soc/intel/xeon_sp/skx/romstage.c
index c4c473b4e6..a1c370d070 100644
--- a/src/soc/intel/xeon_sp/skx/romstage.c
+++ b/src/soc/intel/xeon_sp/skx/romstage.c
@@ -1,7 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/romstage.h>
-#include <cbmem.h>
#include <console/console.h>
#include <intelblocks/rtc.h>
#include <soc/romstage.h>