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author | Felix Held <felix-coreboot@felixheld.de> | 2023-11-16 00:58:30 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-17 16:28:10 +0000 |
commit | 8ccd314ce6b954a93528897fb029e66bf6078bd8 (patch) | |
tree | 8cfd4a3b0d3a780b664a922b30440b995cae3b2e /src/soc | |
parent | 1952d13a414229f1867a8a9c00fc07df07d7042c (diff) |
nb/amd/pi/00730F01: add CPU and domain ops in devicetree
Add the CPU and PCI domain operation bindings statically in the chipset
devicetree instead of adding them during runtime.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I44fa57458c408e74a6341643620c5e9ac1817557
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
0 files changed, 0 insertions, 0 deletions