Merge branch 'me-disable' into mbp10_1

30 files changed, 30 insertions, 37 deletions

diff --git a/src/soc/amd/cezanne/fw.cfg b/src/soc/amd/cezanne/fw.cfg
index 189bc9d0d6..277707de1c 100644
--- a/src/soc/amd/cezanne/fw.cfg
+++ b/src/soc/amd/cezanne/fw.cfg
@@ -29,6 +29,7 @@ KEYDBBL_FILE            TypeId0x50_KeyDbBl_CZN.sbin
 KEYDB_TOS_FILE          TypeId0x51_KeyDbTos_CZN.sbin
 DMCUERAMDCN21_FILE      TypeId0x58_DmcuEramDcn21.sbin
 DMCUINTVECTORSDCN21_FILE  TypeId0x59_DmcuIntvectorsDcn21.sbin
+PSPBTLDR_AB_FILE        TypeId0x73_PspBootLoader_AB_CZN.sbin
 
 # BDT
 PSP_PMUI_FILE1  TypeId0x64_Appb_CZN_1D_Lpddr4_Imem.csbin
diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index 6949fa57b3..a38d706f23 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -22,9 +22,7 @@
 #define FCH_AOAC_DEV_I2C5		10
 #define FCH_AOAC_DEV_UART0		11
 #define FCH_AOAC_DEV_UART1		12
-#define FCH_AOAC_DEV_UART2		16
 #define FCH_AOAC_DEV_AMBA		17
-#define FCH_AOAC_DEV_UART3		26
 #define FCH_AOAC_DEV_ESPI		27
 
 /* IO 0xf0 NCP Error */
diff --git a/src/soc/amd/common/block/lpc/lpc.c b/src/soc/amd/common/block/lpc/lpc.c
index e0c0e42190..7f3bea0da7 100644
--- a/src/soc/amd/common/block/lpc/lpc.c
+++ b/src/soc/amd/common/block/lpc/lpc.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
diff --git a/src/soc/amd/common/block/pi/refcode_loader.c b/src/soc/amd/common/block/pi/refcode_loader.c
index 274291de56..9fc73d4e59 100644
--- a/src/soc/amd/common/block/pi/refcode_loader.c
+++ b/src/soc/amd/common/block/pi/refcode_loader.c
@@ -2,7 +2,6 @@
 
 #include <acpi/acpi.h>
 #include <cbfs.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <rmodule.h>
 #include <stage_cache.h>
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 244d7831ec..9a7d2a5bfc 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -253,7 +253,9 @@ struct soc_amd_picasso_config {
 	bool acp_i2s_use_external_48mhz_osc;
 
 	/* eDP phy tuning settings */
-	uint8_t dp_phy_override;
+	uint16_t edp_phy_override;
+	/* bit vector of phy, bit0=1: DP0, bit1=1: DP1, bit2=1: DP2 bit3=1: DP3 */
+	uint8_t edp_physel;
 
 	struct {
 		uint8_t dp_vs_pemph_level;
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index fa99db8334..e6cd51acc0 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -115,7 +115,7 @@ static void sb_rfmux_config_override(void)
 	}
 }
 
-static void sb_init_acpi_ports(void)
+static void fch_init_acpi_ports(void)
 {
 	u32 reg;
 
@@ -220,7 +220,7 @@ static void gpp_clk_setup(void)
 void fch_init(void *chip_info)
 {
 	i2c_soc_init();
-	sb_init_acpi_ports();
+	fch_init_acpi_ports();
 
 	acpi_pm_gpe_add_events_print_events();
 	gpio_add_events();
diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c
index 731a564416..df5e1e61b4 100644
--- a/src/soc/amd/picasso/fsp_params.c
+++ b/src/soc/amd/picasso/fsp_params.c
@@ -145,12 +145,13 @@ static void fsp_assign_ioapic_upds(FSP_S_CONFIG *scfg)
 static void fsp_edp_tuning_upds(FSP_S_CONFIG *scfg,
 			const struct soc_amd_picasso_config *cfg)
 {
-	if (cfg->dp_phy_override & ENABLE_EDP_TUNINGSET) {
-		scfg->DpPhyOverride = cfg->dp_phy_override;
-		scfg->DpVsPemphLevel = cfg->edp_tuningset.dp_vs_pemph_level;
-		scfg->MarginDeemPh = cfg->edp_tuningset.margin_deemph;
-		scfg->Deemph6db4 = cfg->edp_tuningset.deemph_6db4;
-		scfg->BoostAdj = cfg->edp_tuningset.boostadj;
+	if (cfg->edp_phy_override & ENABLE_EDP_TUNINGSET) {
+		scfg->edp_phy_override = cfg->edp_phy_override;
+		scfg->edp_physel = cfg->edp_physel;
+		scfg->edp_dp_vs_pemph_level = cfg->edp_tuningset.dp_vs_pemph_level;
+		scfg->edp_margin_deemph = cfg->edp_tuningset.margin_deemph;
+		scfg->edp_deemph_6db_4 = cfg->edp_tuningset.deemph_6db4;
+		scfg->edp_boost_adj = cfg->edp_tuningset.boostadj;
 	}
 	if (cfg->edp_pwr_adjust_enable) {
 		scfg->pwron_digon_to_de = cfg->pwron_digon_to_de;
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 2a915965bb..2a78ff9650 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -356,7 +356,7 @@ void sb_enable(struct device *dev)
 	printk(BIOS_DEBUG, "%s\n", __func__);
 }
 
-static void sb_init_acpi_ports(void)
+static void fch_init_acpi_ports(void)
 {
 	u32 reg;
 
@@ -406,7 +406,7 @@ void fch_init(void *chip_info)
 {
 	struct chipset_power_state *state;
 
-	sb_init_acpi_ports();
+	fch_init_acpi_ports();
 
 	state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
 	if (state) {
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index 55ecc006ba..9800563d81 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -5,7 +5,6 @@
 #include <acpi/acpigen.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 773f56eff2..2c271d26ec 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -9,7 +9,6 @@
 #include <arch/smp/mpspec.h>
 #include <assert.h>
 #include <device/pci_ops.h>
-#include <cbmem.h>
 #include <gpio.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index 5433fdc4c5..153ef04073 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -6,7 +6,6 @@
 #include <arch/ioapic.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <types.h>
diff --git a/src/soc/intel/baytrail/refcode.c b/src/soc/intel/baytrail/refcode.c
index 8cd7336a62..d8623ae06e 100644
--- a/src/soc/intel/baytrail/refcode.c
+++ b/src/soc/intel/baytrail/refcode.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <acpi/acpi.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <console/streams.h>
 #include <cpu/x86/tsc.h>
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index b9b3424597..f60ebd8462 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -4,7 +4,6 @@
 #include <acpi/acpigen.h>
 #include <arch/ioapic.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <cpu/intel/haswell/haswell.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
diff --git a/src/soc/intel/broadwell/pch/acpi.c b/src/soc/intel/broadwell/pch/acpi.c
index 38f057e129..48a83df7b2 100644
--- a/src/soc/intel/broadwell/pch/acpi.c
+++ b/src/soc/intel/broadwell/pch/acpi.c
@@ -4,7 +4,6 @@
 #include <acpi/acpigen.h>
 #include <arch/ioapic.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <types.h>
diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c
index 31d6ad8482..5d3ccce7d9 100644
--- a/src/soc/intel/broadwell/refcode.c
+++ b/src/soc/intel/broadwell/refcode.c
@@ -2,7 +2,6 @@
 
 #include <string.h>
 #include <acpi/acpi.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <console/streams.h>
 #include <program_loading.h>
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 943c15e70b..37fe21672d 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -4,7 +4,6 @@
 #include <acpi/acpi_gnvs.h>
 #include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/mmio.h>
 #include <device/pci_ops.h>
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 87b4be7844..9c393e5cec 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -122,11 +122,13 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, "Coffeelake-H Xeon GT2" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT1_1, "Coffeelake-S GT1" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT1_2, "Coffeelake-S GT1" },
 	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, "Coffeelake-S GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_2, "Coffeelake-S GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_3, "Coffeelake-S GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_4, "Coffeelake-S GT2" },
-	{ PCI_DEVICE_ID_INTEL_CFL_U_GT2, "Coffeelake-U GT2" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_5, "Coffeelake-S GT2" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" },
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 7150babc83..ca96f35d20 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -221,11 +221,13 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM,
 	PCI_DEVICE_ID_INTEL_CFL_H_GT2,
 	PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT1_1,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT1_2,
 	PCI_DEVICE_ID_INTEL_CFL_S_GT2_1,
 	PCI_DEVICE_ID_INTEL_CFL_S_GT2_2,
 	PCI_DEVICE_ID_INTEL_CFL_S_GT2_3,
 	PCI_DEVICE_ID_INTEL_CFL_S_GT2_4,
-	PCI_DEVICE_ID_INTEL_CFL_U_GT2,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT2_5,
 	PCI_DEVICE_ID_INTEL_ICL_GT0_ULT,
 	PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT,
 	PCI_DEVICE_ID_INTEL_ICL_GT1_ULT,
diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index cf5613853e..d70706256e 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -18,10 +18,10 @@
 #define TOLUD	0xbc /* Top of Low Used Memory */
 
 /* MCHBAR */
-#define MCHBAR8(x)	(*(volatile u8 *)(MCH_BASE_ADDRESS + x))
-#define MCHBAR16(x)	(*(volatile u16 *)(MCH_BASE_ADDRESS + x))
-#define MCHBAR32(x)	(*(volatile u32 *)(MCH_BASE_ADDRESS + x))
-#define MCHBAR64(x)	(*(volatile u64 *)(MCH_BASE_ADDRESS + x))
+#define MCHBAR8(x)	(*(volatile u8 *)(uintptr_t)(MCH_BASE_ADDRESS + x))
+#define MCHBAR16(x)	(*(volatile u16 *)(uintptr_t)(MCH_BASE_ADDRESS + x))
+#define MCHBAR32(x)	(*(volatile u32 *)(uintptr_t)(MCH_BASE_ADDRESS + x))
+#define MCHBAR64(x)	(*(volatile u64 *)(uintptr_t)(MCH_BASE_ADDRESS + x))
 
 /* Perform System Agent Initialization during Bootblock phase */
 void bootblock_systemagent_early_init(void);
diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c
index ff7457c166..ba64c0436c 100644
--- a/src/soc/intel/elkhartlake/acpi.c
+++ b/src/soc/intel/elkhartlake/acpi.c
@@ -4,7 +4,6 @@
 #include <acpi/acpi_gnvs.h>
 #include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/mmio.h>
diff --git a/src/soc/intel/icelake/acpi.c b/src/soc/intel/icelake/acpi.c
index 6a8e329035..67b7ca513f 100644
--- a/src/soc/intel/icelake/acpi.c
+++ b/src/soc/intel/icelake/acpi.c
@@ -5,7 +5,6 @@
 #include <acpi/acpigen.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/acpi.h>
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c
index 7702bf03e4..a3c2b259d6 100644
--- a/src/soc/intel/jasperlake/acpi.c
+++ b/src/soc/intel/jasperlake/acpi.c
@@ -6,7 +6,6 @@
 #include <device/device.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/pci_ops.h>
 #include <intelblocks/cpulib.h>
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index cb1731f38c..f3e821f439 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -5,7 +5,6 @@
 #include <acpi/acpigen.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
-#include <cbmem.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index d3062cc720..edc716064f 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -105,6 +105,9 @@ struct soc_intel_tigerlake_config {
 	/* Common struct containing power limits configuration information */
 	struct soc_power_limits_config power_limits_config[POWER_LIMITS_MAX];
 
+	/* Configuration for boot TDP selection; */
+	uint8_t ConfigTdpLevel;
+
 	/* Gpio group routed to each dword of the GPE0 block. Values are
 	 * of the form PMC_GPP_[A:U] or GPD. */
 	uint8_t pmc_gpe0_dw0; /* GPE0_31_0 STS/EN */
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 7f7135e308..49af38454f 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -57,6 +57,7 @@ config	CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK_TCO
 	select SOC_INTEL_COMMON_BLOCK_ACPI
 	select TSC_MONOTONIC_TIMER
+	select TPM_STARTUP_IGNORE_POSTINIT if INTEL_TXT
 	select UDELAY_TSC
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
index 99326ee6a4..5e1b412fd3 100644
--- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c
@@ -3,7 +3,6 @@
 #include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <assert.h>
-#include <cbmem.h>
 #include <cpu/intel/turbo.h>
 #include <device/mmio.h>
 #include <device/pci.h>
diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c
index 2d286231a6..79768d48c9 100644
--- a/src/soc/intel/xeon_sp/skx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c
@@ -3,7 +3,6 @@
 #include <acpi/acpigen.h>
 #include <arch/smp/mpspec.h>
 #include <assert.h>
-#include <cbmem.h>
 #include <cpu/intel/turbo.h>
 #include <device/mmio.h>
 #include <device/pci.h>
diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c
index aa8079ef6b..b3a9693ea4 100644
--- a/src/soc/mediatek/mt8173/emi.c
+++ b/src/soc/mediatek/mt8173/emi.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <device/mmio.h>
-#include <boardid.h>
 #include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/dramc_common.h>
diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c
index 93588904b5..daea209082 100644
--- a/src/soc/qualcomm/common/qclib.c
+++ b/src/soc/qualcomm/common/qclib.c
@@ -2,7 +2,6 @@
 
 #include <console/cbmem_console.h>
 #include <cbmem.h>
-#include <boardid.h>
 #include <bootmode.h>
 #include <string.h>
 #include <fmap.h>
diff --git a/src/soc/ti/am335x/header.c b/src/soc/ti/am335x/header.c
index c0a7589abd..66d7c2003e 100644
--- a/src/soc/ti/am335x/header.c
+++ b/src/soc/ti/am335x/header.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <commonlib/bsd/helpers.h>
 #include <stdint.h>
 #include <symbols.h>