diff options
| author | Jamie Ryu <jamie.m.ryu@intel.com> | 2024-10-29 09:13:30 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-08 19:09:55 +0000 |
| commit | 89e6640bf911b607bb169984ee5f20be352d79fa (patch) | |
| tree | 29068b37faf2def5856dedd5556ebb4ad13e1c64 /src/soc | |
| parent | 84527cbb9676bda60fad7448f1ecad50afb98f12 (diff) | |
device/pci_ids, soc/intel/pantherlake: Add new PTL-H DID0
This patch adds new DID0 PCI device IDs for Intel PTL-H.
Additionally, updates the System Agent driver's `systemagent_ids`
list and Panther Lake SoC bootblock to support these new IDs.
Source: Intel PTL-FAS. Document Number 812562
BUG=b:347669091
TEST=Build fatcat and boot with Panther Lake SoC with newly added
MCH ID.
With patch, coreboot log:
`[DEBUG] MCH: device id b004 (rev 00) is Pantherlake H`
`[DEBUG] MCH: device id b00a (rev 00) is Pantherlake H`
Change-Id: I56e795696f661d88828d7549f856eee19c46c942
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84916
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/systemagent/systemagent.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/pantherlake/bootblock/report_platform.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/pantherlake/chip.h | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 3b7163367f..b35820234e 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -427,6 +427,8 @@ static const unsigned short systemagent_ids[] = { PCI_DID_INTEL_PTL_U_ID_1, PCI_DID_INTEL_PTL_H_ID_1, PCI_DID_INTEL_PTL_H_ID_2, + PCI_DID_INTEL_PTL_H_ID_3, + PCI_DID_INTEL_PTL_H_ID_4, PCI_DID_INTEL_LNL_M_ID, PCI_DID_INTEL_LNL_M_ID_1, PCI_DID_INTEL_MTL_M_ID, diff --git a/src/soc/intel/pantherlake/bootblock/report_platform.c b/src/soc/intel/pantherlake/bootblock/report_platform.c index 22cda26982..55afc49219 100644 --- a/src/soc/intel/pantherlake/bootblock/report_platform.c +++ b/src/soc/intel/pantherlake/bootblock/report_platform.c @@ -31,6 +31,8 @@ static struct { { PCI_DID_INTEL_PTL_U_ID_1, "Pantherlake U" }, { PCI_DID_INTEL_PTL_H_ID_1, "Pantherlake H" }, { PCI_DID_INTEL_PTL_H_ID_2, "Pantherlake H" }, + { PCI_DID_INTEL_PTL_H_ID_3, "Pantherlake H" }, + { PCI_DID_INTEL_PTL_H_ID_4, "Pantherlake H" }, }; static struct { diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h index d9028653a6..59aad4f7ce 100644 --- a/src/soc/intel/pantherlake/chip.h +++ b/src/soc/intel/pantherlake/chip.h @@ -66,6 +66,8 @@ static const struct { { PCI_DID_INTEL_PTL_U_ID_1, PTL_U_1_CORE, TDP_15W }, { PCI_DID_INTEL_PTL_H_ID_1, PTL_H_1_CORE, TDP_25W }, { PCI_DID_INTEL_PTL_H_ID_2, PTL_H_3_CORE, TDP_45W }, + { PCI_DID_INTEL_PTL_H_ID_3, PTL_H_1_CORE, TDP_25W }, + { PCI_DID_INTEL_PTL_H_ID_4, PTL_H_1_CORE, TDP_25W }, }; /* Types of display ports */ |