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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-20 20:50:58 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 01:26:30 +0000
commit82faefb339a0853dd49f10bafd2c4f5ca1723fb3 (patch)
treef53d53ffb151ab929b32dece690399d3d8e5f4a6 /src/soc
parent250988d943c322ac1720ae7cd6f88592f82a08c0 (diff)
cpu/x86/mp_init: use cb_err as status return type in remaining functions
Using cb_err as return type of mp_run_on_aps, mp_run_on_all_aps, mp_run_on_all_cpus and mp_park_aps clarifies the meaning of the different return values. This patch also adds the types.h include that provides the definition of the cb_err enum and checks the return value of all 4 functions listed above against the enum values instead of either checking if it's non-zero or less than zero to handle the error case. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4b3f03415a041d3ec9cd0e102980e53868b004b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/cpu/smm/finalize.c3
-rw-r--r--src/soc/amd/common/pi/def_callouts.c7
-rw-r--r--src/soc/intel/apollolake/chip.c3
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c2
-rw-r--r--src/soc/intel/skylake/cpu.c6
5 files changed, 13 insertions, 8 deletions
diff --git a/src/soc/amd/common/block/cpu/smm/finalize.c b/src/soc/amd/common/block/cpu/smm/finalize.c
index 2795100d86..ec975bea27 100644
--- a/src/soc/amd/common/block/cpu/smm/finalize.c
+++ b/src/soc/amd/common/block/cpu/smm/finalize.c
@@ -7,6 +7,7 @@
#include <bootstate.h>
#include <console/console.h>
#include <amdblocks/acpi.h>
+#include <types.h>
static void per_core_finalize(void *unused)
{
@@ -31,7 +32,7 @@ static void finalize_cores(void)
{
printk(BIOS_SPEW, "Lock SMM configuration\n");
- if (mp_run_on_all_cpus(per_core_finalize, NULL))
+ if (mp_run_on_all_cpus(per_core_finalize, NULL) != CB_SUCCESS)
printk(BIOS_WARNING, "Failed to finalize all cores\n");
}
diff --git a/src/soc/amd/common/pi/def_callouts.c b/src/soc/amd/common/pi/def_callouts.c
index 2ee7f46056..0d799b94d2 100644
--- a/src/soc/amd/common/pi/def_callouts.c
+++ b/src/soc/amd/common/pi/def_callouts.c
@@ -10,6 +10,7 @@
#include <amdblocks/agesawrapper_call.h>
#include <amdblocks/reset.h>
#include <soc/southbridge.h>
+#include <types.h>
#if ENV_BOOTBLOCK
const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
@@ -205,7 +206,8 @@ AGESA_STATUS agesa_RunFuncOnAp(uint32_t Func, uintptr_t Data, void *ConfigPtr)
agesadata.Func = Func;
agesadata.Data = Data;
agesadata.ConfigPtr = ConfigPtr;
- if (mp_run_on_aps(callout_ap_entry, NULL, MP_RUN_ON_ALL_CPUS, 100 * USECS_PER_MSEC))
+ if (mp_run_on_aps(callout_ap_entry, NULL, MP_RUN_ON_ALL_CPUS, 100 * USECS_PER_MSEC) !=
+ CB_SUCCESS)
return AGESA_ERROR;
return AGESA_SUCCESS;
@@ -219,7 +221,8 @@ AGESA_STATUS agesa_RunFcnOnAllAps(uint32_t Func, uintptr_t Data,
agesadata.Func = Func;
agesadata.Data = Data;
agesadata.ConfigPtr = ConfigPtr;
- if (mp_run_on_aps(callout_ap_entry, NULL, MP_RUN_ON_ALL_CPUS, 100 * USECS_PER_MSEC))
+ if (mp_run_on_aps(callout_ap_entry, NULL, MP_RUN_ON_ALL_CPUS, 100 * USECS_PER_MSEC) !=
+ CB_SUCCESS)
return AGESA_ERROR;
return AGESA_SUCCESS;
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 4cc29e6e21..057138c803 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -35,6 +35,7 @@
#include <timer.h>
#include <soc/ramstage.h>
#include <soc/soc_chip.h>
+#include <types.h>
#include "chip.h"
@@ -704,7 +705,7 @@ struct chip_operations soc_intel_apollolake_ops = {
static void drop_privilege_all(void)
{
/* Drop privilege level on all the CPUs */
- if (mp_run_on_all_cpus(&cpu_enable_untrusted_mode, NULL) < 0)
+ if (mp_run_on_all_cpus(&cpu_enable_untrusted_mode, NULL) != CB_SUCCESS)
printk(BIOS_ERR, "failed to enable untrusted mode\n");
}
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 4a429ab8f8..acd15a8f2c 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -157,7 +157,7 @@ static void wrapper_x86_setup_mtrrs(void *unused)
/* Ensure to re-program all MTRRs based on DRAM resource settings */
static void post_cpus_init(void *unused)
{
- if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) < 0)
+ if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) != CB_SUCCESS)
printk(BIOS_ERR, "MTRR programming failure\n");
x86_mtrr_check();
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index d88dd36ad6..86e8e52797 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -178,14 +178,14 @@ static void post_mp_init(void)
if (CONFIG(HAVE_SMI_HANDLER))
smm_lock();
- if (mp_run_on_all_cpus(vmx_configure, NULL))
+ if (mp_run_on_all_cpus(vmx_configure, NULL) != CB_SUCCESS)
failure = true;
if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
- if (mp_run_on_all_cpus(sgx_configure, NULL))
+ if (mp_run_on_all_cpus(sgx_configure, NULL) != CB_SUCCESS)
failure = true;
- if (mp_run_on_all_cpus(fc_lock_configure, NULL))
+ if (mp_run_on_all_cpus(fc_lock_configure, NULL) != CB_SUCCESS)
failure = true;
if (failure)