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author | Felix Held <felix-coreboot@felixheld.de> | 2021-10-23 01:13:04 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-26 20:02:14 +0000 |
commit | 761e2ae676e8f7e577dca710b4d574f46c54b203 (patch) | |
tree | bf8f6c6ba0db214eaee60ff63a99fc72de1c0821 /src/soc | |
parent | 39789eb6955040a26b5b9d7614790e565be2fada (diff) |
cpu/x86/Kconfig.debug_cpu: drop HAVE_DISPLAY_MTRRS option
Since all x86 CPUs in tree have MTRR support, there is no need to guard
the DISPLAY_MTRRS option with HAVE_DISPLAY_MTRRS. Also all x86 CPUs/SoCs
have a display_mtrrs call at least somewhere in their code, so selecting
the DISPLAY_MTRRS option will always have an effect. All SoCs that don't
select RESET_VECTOR_IN_RAM have the postcar stage where it gets called.
The two AMD SoCs that select RESET_VECTOR_IN_RAM use the FSP2 driver
which contains plenty of display_mtrrs calls.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2894689ce58e7404d9d5a894f3c288bc4016ea19
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51575
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/common/Kconfig.common | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/Kconfig.common b/src/soc/intel/common/Kconfig.common index f39571ee44..5f1f608c4e 100644 --- a/src/soc/intel/common/Kconfig.common +++ b/src/soc/intel/common/Kconfig.common @@ -1,7 +1,6 @@ config SOC_INTEL_COMMON bool select AZALIA_PLUGIN_SUPPORT - select HAVE_DISPLAY_MTRRS select ACPI_SOC_NVS help common code for Intel SOCs |