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authorSubrata Banik <subrata.banik@intel.com>2021-10-26 20:46:21 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-11-11 09:10:10 +0000
commit6de8b424824069345714001766b389f0b992df8e (patch)
treeff3b4a308ce58213e068e7709584b3fdb04b98f5 /src/soc
parent9a3bde0581a574956dd57ca24683c41ac7e0edfc (diff)
arch/x86: Refactor the SMBIOS type 17 write function
List of changes: 1. Create Module Type macros as per Memory Type (i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation issue due to renaming of existing macros due to scoping the Memory Type. 2. Use dedicated Memory Type and Module type for `Form Factor` and `TypeDetail` conversion using `get_spd_info()` function. 3. Create a new API (convert_form_factor_to_module_type()) for `Form Factor` to 'Module type' conversion as per `Memory Type`. 4. Add new argument as `Memory Type` to smbios_form_factor_to_spd_mod_type() so that it can internally call convert_form_factor_to_module_type() for `Module Type` conversion. 5. Update `test_smbios_form_factor_to_spd_mod_type()` to accommodate different memory types. 6. Skip fixed module type to form factor conversion using DDR2 SPD4 specification (inside dimm_info_fill()). Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx. BUG=b:194659789 TEST=Refer to dmidecode -t 17 output as below: Without this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Unknown .... With this code change: Handle 0x0012, DMI type 17, 40 bytes Memory Device Array Handle: 0x000A Error Information Handle: Not Provided Total Width: 16 bits Data Width: 16 bits Size: 2048 MB Form Factor: Row Of Chips .... Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/fsp/dmi.c3
-rw-r--r--src/soc/amd/common/pi/amd_late_init.c3
-rw-r--r--src/soc/intel/common/smbios.c23
3 files changed, 5 insertions, 24 deletions
diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c
index 223cce1577..b96b047627 100644
--- a/src/soc/amd/common/fsp/dmi.c
+++ b/src/soc/amd/common/fsp/dmi.c
@@ -52,7 +52,8 @@ static void transfer_memory_info(const TYPE17_DMI_INFO *dmi17,
dimm->rank_per_dimm = dmi17->Attributes;
- dimm->mod_type = smbios_form_factor_to_spd_mod_type(dmi17->FormFactor);
+ dimm->mod_type = smbios_form_factor_to_spd_mod_type(dmi17->MemoryType,
+ dmi17->FormFactor);
dimm->bus_width = smbios_bus_width_to_spd_width(dmi17->MemoryType, dmi17->TotalWidth,
dmi17->DataWidth);
diff --git a/src/soc/amd/common/pi/amd_late_init.c b/src/soc/amd/common/pi/amd_late_init.c
index 3714404590..4d2250b5ce 100644
--- a/src/soc/amd/common/pi/amd_late_init.c
+++ b/src/soc/amd/common/pi/amd_late_init.c
@@ -36,7 +36,8 @@ static void transfer_memory_info(TYPE17_DMI_INFO *dmi17,
dimm->rank_per_dimm = dmi17->Attributes;
- dimm->mod_type = smbios_form_factor_to_spd_mod_type(dmi17->FormFactor);
+ dimm->mod_type = smbios_form_factor_to_spd_mod_type(dmi17->MemoryType,
+ dmi17->FormFactor);
dimm->bus_width = smbios_bus_width_to_spd_width(dmi17->MemoryType, dmi17->TotalWidth,
dmi17->DataWidth);
diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c
index 213be6578b..4aca022d6f 100644
--- a/src/soc/intel/common/smbios.c
+++ b/src/soc/intel/common/smbios.c
@@ -18,28 +18,7 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
bool ecc_support, u16 mod_id, u8 mod_type)
{
dimm->mod_id = mod_id;
- /* Translate to DDR2 module type field that SMBIOS code expects. */
- switch (mod_type) {
- case SPD_DDR3_DIMM_TYPE_SO_DIMM:
- dimm->mod_type = SPD_SODIMM;
- break;
- case SPD_DDR3_DIMM_TYPE_72B_SO_CDIMM:
- dimm->mod_type = SPD_72B_SO_CDIMM;
- break;
- case SPD_DDR3_DIMM_TYPE_72B_SO_RDIMM:
- dimm->mod_type = SPD_72B_SO_RDIMM;
- break;
- case SPD_DDR3_DIMM_TYPE_UDIMM:
- dimm->mod_type = SPD_UDIMM;
- break;
- case SPD_DDR3_DIMM_TYPE_RDIMM:
- dimm->mod_type = SPD_RDIMM;
- break;
- case SPD_DDR3_DIMM_TYPE_UNDEFINED:
- default:
- dimm->mod_type = SPD_UNDEFINED;
- break;
- }
+ dimm->mod_type = mod_type;
dimm->dimm_size = dimm_capacity;
dimm->ddr_type = ddr_type;
dimm->ddr_frequency = frequency;