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authorBora Guvendik <bora.guvendik@intel.com>2017-10-11 17:54:58 -0700
committerAaron Durbin <adurbin@chromium.org>2017-10-12 18:26:52 +0000
commit630b644cecf0cb3ac3dacc8b0854a92d0ac58598 (patch)
treeae89438f05d2b4997e92bdb71697d60004eb524e /src/soc
parentb4e275f97bc5221b98b91bb5b54f088d07570a57 (diff)
soc/intel/cannonlake: add length information for communities
TEST = Boot to OS, check if pinctrl probed successfully Change-Id: Ib20c955d535cd9c48175b4d3934b4699b6186874 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/21974 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/acpi/gpio.asl6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl
index ae3ef5b0b7..c2bf8d98e6 100644
--- a/src/soc/intel/cannonlake/acpi/gpio.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio.asl
@@ -37,15 +37,21 @@ Device (GPIO)
{
/* GPIO Community 0 */
CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
+ CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
Store (^^PCRB (PID_GPIOCOM0), BAS0)
+ Store (GPIO_BASE_SIZE, LEN0)
/* GPIO Community 1 */
CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
+ CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
Store (^^PCRB (PID_GPIOCOM1), BAS1)
+ Store (GPIO_BASE_SIZE, LEN1)
/* GPIO Community 4 */
CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
+ CreateDWordField (^RBUF, ^COM4._LEN, LEN3)
Store (^^PCRB (PID_GPIOCOM4), BAS4)
+ Store (GPIO_BASE_SIZE, LEN3)
Return (RBUF)
}